Mesa (main): radv: move nir_opt_shrink_stores from radv_optimize_nir()

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: af4b26c53a0b9bd056d4fe3af46f2774e8e279c6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=af4b26c53a0b9bd056d4fe3af46f2774e8e279c6

Author: Daniel Schürmann <daniel at schuermann.dev>
Date:   Mon Jan 10 16:16:16 2022 +0000

radv: move nir_opt_shrink_stores from radv_optimize_nir()

No need to call this pass in a loop.

Reviewed-by: Emma Anholt <emma at anholt.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14480>

---

 src/amd/vulkan/radv_pipeline.c |  7 ++-----
 src/amd/vulkan/radv_shader.c   | 10 ++++------
 src/amd/vulkan/radv_shader.h   |  3 +--
 3 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 40a628f23b6..3d8f625193f 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2555,8 +2555,6 @@ radv_link_shaders(struct radv_pipeline *pipeline,
          if (nir_lower_io_to_scalar_early(ordered_shaders[i], mask)) {
             /* Optimize the new vector code and then remove dead vars */
             nir_copy_prop(ordered_shaders[i]);
-            nir_opt_shrink_stores(ordered_shaders[i],
-                                  !pipeline->device->instance->disable_shrink_image_store);
             nir_opt_shrink_vectors(ordered_shaders[i]);
 
             if (ordered_shaders[i]->info.stage != last) {
@@ -3803,7 +3801,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
    for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; ++i) {
       if (nir[i]) {
          radv_start_feedback(stage_feedbacks[i]);
-         radv_optimize_nir(device, nir[i], optimize_conservatively, false);
+         radv_optimize_nir(nir[i], optimize_conservatively, false);
 
          /* Gather info again, information such as outputs_read can be out-of-date. */
          nir_shader_gather_info(nir[i], nir_shader_get_entrypoint(nir[i]));
@@ -3889,14 +3887,13 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
 
          if (nir_opt_load_store_vectorize(nir[i], &vectorize_opts)) {
             NIR_PASS_V(nir[i], nir_copy_prop);
+            nir_opt_shrink_stores(nir[i], !device->instance->disable_shrink_image_store);
             lower_to_scalar = true;
 
             /* Gather info again, to update whether 8/16-bit are used. */
             nir_shader_gather_info(nir[i], nir_shader_get_entrypoint(nir[i]));
          }
 
-         lower_to_scalar |=
-            nir_opt_shrink_stores(nir[i], !device->instance->disable_shrink_image_store);
          nir_opt_shrink_vectors(nir[i]);
 
          if (lower_to_scalar)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 6fe9a82f2fb..e951c772378 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -145,8 +145,7 @@ radv_can_dump_shader_stats(struct radv_device *device, struct vk_shader_module *
 }
 
 void
-radv_optimize_nir(const struct radv_device *device, struct nir_shader *shader,
-                  bool optimize_conservatively, bool allow_copies)
+radv_optimize_nir(struct nir_shader *shader, bool optimize_conservatively, bool allow_copies)
 {
    bool progress;
 
@@ -192,8 +191,6 @@ radv_optimize_nir(const struct radv_device *device, struct nir_shader *shader,
       NIR_PASS(progress, shader, nir_opt_algebraic);
 
       NIR_PASS(progress, shader, nir_opt_undef);
-      NIR_PASS(progress, shader, nir_opt_shrink_stores,
-               !device->instance->disable_shrink_image_store);
       NIR_PASS(progress, shader, nir_opt_shrink_vectors);
       if (shader->options->max_unroll_iterations) {
          NIR_PASS(progress, shader, nir_opt_loop_unroll);
@@ -824,9 +821,10 @@ radv_shader_compile_to_nir(struct radv_device *device, struct vk_shader_module *
                             });
 
    nir_lower_load_const_to_scalar(nir);
+   nir_opt_shrink_stores(nir, !device->instance->disable_shrink_image_store);
 
    if (!key->optimisations_disabled)
-      radv_optimize_nir(device, nir, false, true);
+      radv_optimize_nir(nir, false, true);
 
    /* call radv_nir_lower_ycbcr_textures() late as there might still be
     * tex with undef texture/sampler before first optimization */
@@ -899,7 +897,7 @@ radv_shader_compile_to_nir(struct radv_device *device, struct vk_shader_module *
    if (ac_nir_lower_indirect_derefs(nir, device->physical_device->rad_info.chip_class) &&
        !key->optimisations_disabled && nir->info.stage != MESA_SHADER_COMPUTE) {
       /* Optimize the lowered code before the linking optimizations. */
-      radv_optimize_nir(device, nir, false, false);
+      radv_optimize_nir(nir, false, false);
    }
 
    return nir;
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 7e477a020db..7cbdb357740 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -494,8 +494,7 @@ struct radv_shader_prolog {
    char *disasm_string;
 };
 
-void radv_optimize_nir(const struct radv_device *device, struct nir_shader *shader,
-                       bool optimize_conservatively, bool allow_copies);
+void radv_optimize_nir(struct nir_shader *shader, bool optimize_conservatively, bool allow_copies);
 void radv_optimize_nir_algebraic(nir_shader *shader, bool opt_offsets);
 bool radv_nir_lower_ycbcr_textures(nir_shader *shader, const struct radv_pipeline_layout *layout);