Mesa (main): radv: rename RADV_FORCE_VRS_NONE to RADV_FORCE_VRS_1x1 and accept 1x1
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gitlab-mirror at kemper.freedesktop.org
Wed Feb 16 08:49:13 UTC 2022
Module: Mesa
Branch: main
Commit: a862e15ee7c314fe379fc348d4e73527477913d5
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a862e15ee7c314fe379fc348d4e73527477913d5
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Tue Jan 25 13:50:19 2022 +0100
radv: rename RADV_FORCE_VRS_NONE to RADV_FORCE_VRS_1x1 and accept 1x1
It's the default value.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14713>
---
docs/envvars.rst | 2 +-
src/amd/vulkan/radv_cmd_buffer.c | 2 +-
src/amd/vulkan/radv_device.c | 4 +++-
src/amd/vulkan/radv_pipeline.c | 2 +-
src/amd/vulkan/radv_private.h | 2 +-
5 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/docs/envvars.rst b/docs/envvars.rst
index 32f9c26b990..a595197cacc 100644
--- a/docs/envvars.rst
+++ b/docs/envvars.rst
@@ -689,7 +689,7 @@ RADV driver environment variables
:envvar:`RADV_FORCE_VRS`
allow to force per-pipeline vertex VRS rates on GFX10.3+. This is only
forced for pipelines that don't explicitely use VRS or flat shading.
- The supported values are 2x2, 1x2 and 2x1. Only for testing purposes.
+ The supported values are 2x2, 1x2, 2x1 and 1x1. Only for testing purposes.
:envvar:`RADV_PERFTEST`
a comma-separated list of named flags, which do various things:
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index ecdf99a6acd..636ed8c9097 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -6657,7 +6657,7 @@ radv_emit_all_graphics_states(struct radv_cmd_buffer *cmd_buffer, const struct r
}
}
- if (cmd_buffer->device->force_vrs != RADV_FORCE_VRS_NONE) {
+ if (cmd_buffer->device->force_vrs != RADV_FORCE_VRS_1x1) {
struct radv_dynamic_state *d = &cmd_buffer->state.dynamic;
uint64_t dynamic_states =
cmd_buffer->state.dirty & cmd_buffer->state.emitted_pipeline->graphics.needed_dynamic_state;
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index e3a7ec708a8..e525df6c5df 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -3223,6 +3223,8 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr
device->force_vrs = RADV_FORCE_VRS_2x1;
else if (!strcmp(vrs_rates, "1x2"))
device->force_vrs = RADV_FORCE_VRS_1x2;
+ else if (!strcmp(vrs_rates, "1x1"))
+ device->force_vrs = RADV_FORCE_VRS_1x1;
else
fprintf(stderr, "radv: Invalid VRS rates specified "
"(valid values are 2x2, 2x1 and 1x2)\n");
@@ -3230,7 +3232,7 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr
device->adjust_frag_coord_z =
(device->vk.enabled_extensions.KHR_fragment_shading_rate ||
- device->force_vrs != RADV_FORCE_VRS_NONE) &&
+ device->force_vrs != RADV_FORCE_VRS_1x1) &&
(device->physical_device->rad_info.family == CHIP_SIENNA_CICHLID ||
device->physical_device->rad_info.family == CHIP_NAVY_FLOUNDER ||
device->physical_device->rad_info.family == CHIP_VANGOGH);
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 761b10990a1..a7de117e9b5 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3664,7 +3664,7 @@ radv_consider_force_vrs(const struct radv_pipeline *pipeline, bool noop_fs, nir_
{
struct radv_device *device = pipeline->device;
- if (device->force_vrs == RADV_FORCE_VRS_NONE)
+ if (device->force_vrs == RADV_FORCE_VRS_1x1)
return false;
/* Only VS and GS are supported for now. */
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index c1fe1ee8bab..b63166653b6 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -742,7 +742,7 @@ struct radv_device_border_color_data {
};
enum radv_force_vrs {
- RADV_FORCE_VRS_NONE = 0,
+ RADV_FORCE_VRS_1x1 = 0,
RADV_FORCE_VRS_2x2,
RADV_FORCE_VRS_2x1,
RADV_FORCE_VRS_1x2,
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