Mesa (main): ir3: Use CAN_REORDER instead of NON_WRITEABLE

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Module: Mesa
Branch: main
Commit: e1c4c2ac60e47a8841eb5d0a2714f87a3dc4fa49
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1c4c2ac60e47a8841eb5d0a2714f87a3dc4fa49

Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Mon Feb 21 18:42:49 2022 +0100

ir3: Use CAN_REORDER instead of NON_WRITEABLE

CAN_REORDER takes volatile into account, and is closer to what we
actually require to use texture instructions, which is that we can
arbitrarily reorder loads.

Fixes: aa93896 ("freedreno/ir3: adjust condition for when to use ldib")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15114>

---

 src/freedreno/ir3/ir3_compiler_nir.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 9611e743e81..750409d82eb 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -1396,7 +1396,7 @@ emit_intrinsic_load_image(struct ir3_context *ctx, nir_intrinsic_instr *intr,
    /* If the image can be written, must use LDIB to retrieve data, rather than
     * through ISAM (which uses the texture cache and won't get previous writes).
     */
-   if (!(nir_intrinsic_access(intr) & ACCESS_NON_WRITEABLE) && ctx->compiler->gen >= 5) {
+   if (!(nir_intrinsic_access(intr) & ACCESS_CAN_REORDER) && ctx->compiler->gen >= 5) {
       ctx->funcs->emit_intrinsic_load_image(ctx, intr, dst);
       return;
    }