Mesa (main): intel/dev: Implement DG2 restrictions requiring additional DSSes to be disabled.

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Module: Mesa
Branch: main
Commit: 054eb9f3468068085f23b991321a23b900a52009
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=054eb9f3468068085f23b991321a23b900a52009

Author: Francisco Jerez <currojerez at riseup.net>
Date:   Thu Dec  9 16:29:06 2021 -0800

intel/dev: Implement DG2 restrictions requiring additional DSSes to be disabled.

Note that this causes a geometry slice to be disabled if any DSS is
fused off within that slice, which may seem stricter than the BSpec
quotation implies, but testing shows that pixel pipes with any faulted
DSS don't work at all, and that using a slice with any faulted pixel
pipe leads to serious graphics corruption.

It would be better to query this geometry topology information from
the hardware instead of trying to reconstruct it here, but the kernel
interface for that is not available yet.

Reviewed-by: Caio Oliveira <caio.oliveira at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14436>

---

 src/intel/dev/intel_device_info.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/src/intel/dev/intel_device_info.c b/src/intel/dev/intel_device_info.c
index 61da6aa891f..b05ae0da5ef 100644
--- a/src/intel/dev/intel_device_info.c
+++ b/src/intel/dev/intel_device_info.c
@@ -1110,6 +1110,25 @@ update_from_topology(struct intel_device_info *devinfo,
          else
             devinfo->ppipe_subslices[p] = 0;
       }
+
+      /* From the "Fusing information" BSpec page regarding DG2
+       * configurations where at least a slice has a single pixel pipe
+       * fused off:
+       *
+       * "Fault disable any 2 DSS in a Gslice and disable that Gslice
+       *  (incl. geom/color/Z)"
+       *
+       * XXX - Query geometry topology from hardware once kernel
+       *       interface is available instead of trying to do
+       *       guesswork here.
+       */
+      if (intel_device_info_is_dg2(devinfo)) {
+         for (unsigned p = 0; p < INTEL_DEVICE_MAX_PIXEL_PIPES; p++) {
+            if (devinfo->ppipe_subslices[p] < 2 ||
+                devinfo->ppipe_subslices[p ^ 1] < 2)
+               devinfo->ppipe_subslices[p] = 0;
+         }
+      }
    }
 
    if (devinfo->ver == 12 && devinfo->num_slices == 1) {