Mesa (main): freedreno/a6xx: Fix clip_mask

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Module: Mesa
Branch: main
Commit: d26cdfac2c43e84c1a21fb7614939bf5b1b3ba03
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d26cdfac2c43e84c1a21fb7614939bf5b1b3ba03

Author: Rob Clark <robdclark at chromium.org>
Date:   Thu Jan 20 15:32:34 2022 -0800

freedreno/a6xx: Fix clip_mask

The clip_mask needs to also take into account rast->clip_plane_enable

Fixes: f2ae8d116ab ("freedreno/a6xx: Implement user clip/cull distances")
Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14643>

---

 src/gallium/drivers/freedreno/a5xx/fd5_draw.c    | 1 +
 src/gallium/drivers/freedreno/a6xx/fd6_context.c | 3 ++-
 src/gallium/drivers/freedreno/a6xx/fd6_draw.c    | 3 ++-
 src/gallium/drivers/freedreno/a6xx/fd6_program.c | 2 ++
 src/gallium/drivers/freedreno/ir3/ir3_cache.h    | 7 +++++++
 5 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
index af58229a840..2c932f7cfae 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c
@@ -87,6 +87,7 @@ fd5_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
          .key = {
             .rasterflat = ctx->rasterizer->flatshade,
          },
+         .clip_plane_enable = ctx->rasterizer->clip_plane_enable,
       },
       .rasterflat = ctx->rasterizer->flatshade,
       .sprite_coord_enable = ctx->rasterizer->sprite_coord_enable,
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.c b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
index 7951e1094e3..501ec79a912 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.c
@@ -151,7 +151,8 @@ setup_state_map(struct fd_context *ctx)
                       BIT(FD6_GROUP_ZSA));
    fd_context_add_map(ctx, FD_DIRTY_ZSA | FD_DIRTY_BLEND | FD_DIRTY_PROG,
                       BIT(FD6_GROUP_LRZ) | BIT(FD6_GROUP_LRZ_BINNING));
-   fd_context_add_map(ctx, FD_DIRTY_PROG, BIT(FD6_GROUP_PROG));
+   fd_context_add_map(ctx, FD_DIRTY_PROG | FD_DIRTY_RASTERIZER_CLIP_PLANE_ENABLE,
+                      BIT(FD6_GROUP_PROG));
    fd_context_add_map(ctx, FD_DIRTY_RASTERIZER, BIT(FD6_GROUP_RASTERIZER));
    fd_context_add_map(ctx,
                       FD_DIRTY_FRAMEBUFFER | FD_DIRTY_RASTERIZER_DISCARD |
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index 1c3a0afe3aa..a7e76679795 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -156,6 +156,7 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
             .sample_shading = (ctx->min_samples > 1),
             .msaa = (ctx->framebuffer.samples > 1),
          },
+         .clip_plane_enable = ctx->rasterizer->clip_plane_enable,
       },
       .rasterflat = ctx->rasterizer->flatshade,
       .sprite_coord_enable = ctx->rasterizer->sprite_coord_enable,
@@ -195,7 +196,7 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
 
    ir3_fixup_shader_state(&ctx->base, &emit.key.key);
 
-   if (!(ctx->dirty & FD_DIRTY_PROG)) {
+   if (!(ctx->gen_dirty & BIT(FD6_GROUP_PROG))) {
       emit.prog = fd6_ctx->prog;
    } else {
       fd6_ctx->prog = fd6_emit_get_prog(&emit);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index 889ff8d6b61..5a0e8dd0620 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -585,6 +585,8 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_context *ctx,
            cull_mask = last_shader->cull_mask;
    uint8_t clip_cull_mask = clip_mask | cull_mask;
 
+   clip_mask &= cache_key->clip_plane_enable;
+
    /* If we have streamout, link against the real FS, rather than the
     * dummy FS used for binning pass state, to ensure the OUTLOC's
     * match.  Depending on whether we end up doing sysmem or gmem,
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_cache.h b/src/gallium/drivers/freedreno/ir3/ir3_cache.h
index 276b78b3555..b94ad3b65a3 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_cache.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_cache.h
@@ -27,6 +27,8 @@
 #ifndef IR3_CACHE_H_
 #define IR3_CACHE_H_
 
+#include "pipe/p_state.h"
+
 #include "ir3/ir3_shader.h"
 
 /*
@@ -39,6 +41,11 @@
 struct ir3_cache_key {
    struct ir3_shader_state *vs, *hs, *ds, *gs, *fs; // 5 pointers
    struct ir3_shader_key key;                       // 7 dwords
+
+   /* Additional state that effects the cached program state, but
+    * not the compiled shader:
+    */
+   unsigned clip_plane_enable : PIPE_MAX_CLIP_PLANES;
 };
 
 /* per-gen backend program state object should subclass this for it's