Mesa (main): zink: allow multiple tex components for depth tg4

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Module: Mesa
Branch: main
Commit: 35a4b8989fbd7314a5def5eecb634961cf016a29
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=35a4b8989fbd7314a5def5eecb634961cf016a29

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Tue Jul  5 13:05:43 2022 -0400

zink: allow multiple tex components for depth tg4

this returns a vec4, so don't break the return type by clamping 1 component

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17427>

---

 src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
index 94f38d658b9..6bb996c5aaa 100644
--- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
+++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
@@ -3587,7 +3587,7 @@ emit_tex(struct ntv_context *ctx, nir_tex_instr *tex)
       return;
    }
    SpvId actual_dest_type;
-   if (dref)
+   if (dref && tex->op != nir_texop_tg4)
       actual_dest_type =
          spirv_builder_type_float(&ctx->builder,
                                   nir_dest_bit_size(tex->dest));