Mesa (main): anv: Stop merging DEPTH_STENCIL state
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Tue Jul 19 23:53:37 UTC 2022
Module: Mesa
Branch: main
Commit: cc89232f2e97db419de8351314bef388c8867ac5
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cc89232f2e97db419de8351314bef388c8867ac5
Author: Jason Ekstrand <jason.ekstrand at collabora.com>
Date: Thu Jul 14 11:55:04 2022 -0500
anv: Stop merging DEPTH_STENCIL state
Now that we've stopped trying to do dynamic stuff up-front, we're only
merging in one bit: DoubleSidedStencilEnable. There's no point in all
the merging code for one bit which is a constant anyway.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17564>
---
src/intel/vulkan/anv_private.h | 6 ---
src/intel/vulkan/genX_pipeline.c | 23 --------
src/intel/vulkan/gfx7_cmd_buffer.c | 7 +--
src/intel/vulkan/gfx8_cmd_buffer.c | 104 ++++++++++++++++---------------------
4 files changed, 50 insertions(+), 90 deletions(-)
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 8734e810a76..8be0252f22c 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -3368,7 +3368,6 @@ struct anv_graphics_pipeline {
*/
struct {
uint32_t sf[7];
- uint32_t depth_stencil_state[3];
uint32_t clip[4];
uint32_t xfb_bo_pitch[4];
uint32_t wm[3];
@@ -3379,16 +3378,11 @@ struct anv_graphics_pipeline {
struct {
uint32_t sf[4];
uint32_t raster[5];
- uint32_t wm_depth_stencil[3];
uint32_t wm[2];
uint32_t ps_blend[2];
uint32_t blend_state[1 + MAX_RTS * 2];
uint32_t streamout_state[5];
} gfx8;
-
- struct {
- uint32_t wm_depth_stencil[4];
- } gfx9;
};
struct anv_compute_pipeline {
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index e44ef626d08..2105eefbec0 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -979,14 +979,6 @@ emit_ds_state(struct anv_graphics_pipeline *pipeline,
const struct vk_depth_stencil_state *ds_in,
const struct vk_render_pass_state *rp)
{
-#if GFX_VER == 7
-# define depth_stencil_dw pipeline->gfx7.depth_stencil_state
-#elif GFX_VER == 8
-# define depth_stencil_dw pipeline->gfx8.wm_depth_stencil
-#else
-# define depth_stencil_dw pipeline->gfx9.wm_depth_stencil
-#endif
-
if (ds_in == NULL) {
/* We're going to OR this together with the dynamic state. We need
* to make sure it's initialized to something useful.
@@ -996,7 +988,6 @@ emit_ds_state(struct anv_graphics_pipeline *pipeline,
pipeline->writes_depth = false;
pipeline->depth_test_enable = false;
pipeline->depth_bounds_test_enable = false;
- memset(depth_stencil_dw, 0, sizeof(depth_stencil_dw));
return;
}
@@ -1015,20 +1006,6 @@ emit_ds_state(struct anv_graphics_pipeline *pipeline,
pipeline->writes_depth = ds.depth.write_enable;
pipeline->depth_test_enable = ds.depth.test_enable;
pipeline->depth_bounds_test_enable = ds.depth.bounds_test.enable;
-
-#if GFX_VER <= 7
- struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
-#else
- struct GENX(3DSTATE_WM_DEPTH_STENCIL) depth_stencil = {
-#endif
- .DoubleSidedStencilEnable = true,
- };
-
-#if GFX_VER <= 7
- GENX(DEPTH_STENCIL_STATE_pack)(NULL, depth_stencil_dw, &depth_stencil);
-#else
- GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, depth_stencil_dw, &depth_stencil);
-#endif
}
static bool
diff --git a/src/intel/vulkan/gfx7_cmd_buffer.c b/src/intel/vulkan/gfx7_cmd_buffer.c
index 0a665bbf598..5d778e40f0b 100644
--- a/src/intel/vulkan/gfx7_cmd_buffer.c
+++ b/src/intel/vulkan/gfx7_cmd_buffer.c
@@ -143,6 +143,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
uint32_t depth_stencil_dw[GENX(DEPTH_STENCIL_STATE_length)];
struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
+ .DoubleSidedStencilEnable = true,
+
.StencilTestMask = d->stencil_compare_mask.front & 0xff,
.StencilWriteMask = d->stencil_write_mask.front & 0xff,
@@ -169,9 +171,8 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
GENX(DEPTH_STENCIL_STATE_pack)(NULL, depth_stencil_dw, &depth_stencil);
struct anv_state ds_state =
- anv_cmd_buffer_merge_dynamic(cmd_buffer, depth_stencil_dw,
- pipeline->gfx7.depth_stencil_state,
- GENX(DEPTH_STENCIL_STATE_length), 64);
+ anv_cmd_buffer_emit_dynamic(cmd_buffer, depth_stencil_dw,
+ sizeof(depth_stencil_dw), 64);
anv_batch_emit(&cmd_buffer->batch,
GENX(3DSTATE_DEPTH_STENCIL_STATE_POINTERS), dsp) {
diff --git a/src/intel/vulkan/gfx8_cmd_buffer.c b/src/intel/vulkan/gfx8_cmd_buffer.c
index 7f0a12d2be4..98b31fb5a35 100644
--- a/src/intel/vulkan/gfx8_cmd_buffer.c
+++ b/src/intel/vulkan/gfx8_cmd_buffer.c
@@ -430,39 +430,32 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP)) {
- uint32_t wm_depth_stencil_dw[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
+ anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_DEPTH_STENCIL), ds) {
+ ds.DoubleSidedStencilEnable = true;
- struct GENX(3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil) = {
- GENX(3DSTATE_WM_DEPTH_STENCIL_header),
+ ds.StencilTestMask = d->stencil_compare_mask.front & 0xff;
+ ds.StencilWriteMask = d->stencil_write_mask.front & 0xff;
- .StencilTestMask = d->stencil_compare_mask.front & 0xff,
- .StencilWriteMask = d->stencil_write_mask.front & 0xff,
+ ds.BackfaceStencilTestMask = d->stencil_compare_mask.back & 0xff;
+ ds.BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff;
- .BackfaceStencilTestMask = d->stencil_compare_mask.back & 0xff,
- .BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff,
-
- .StencilBufferWriteEnable =
+ ds.StencilBufferWriteEnable =
(d->stencil_write_mask.front || d->stencil_write_mask.back) &&
- d->stencil_test_enable,
-
- .DepthTestEnable = d->depth_test_enable,
- .DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable,
- .DepthTestFunction = genX(vk_to_intel_compare_op)[d->depth_compare_op],
- .StencilTestEnable = d->stencil_test_enable,
- .StencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.fail_op],
- .StencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.pass_op],
- .StencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.depth_fail_op],
- .StencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.front.compare_op],
- .BackfaceStencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.fail_op],
- .BackfaceStencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.pass_op],
- .BackfaceStencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.depth_fail_op],
- .BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.back.compare_op],
- };
- GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, wm_depth_stencil_dw,
- &wm_depth_stencil);
-
- anv_batch_emit_merge(&cmd_buffer->batch, wm_depth_stencil_dw,
- pipeline->gfx8.wm_depth_stencil);
+ d->stencil_test_enable;
+
+ ds.DepthTestEnable = d->depth_test_enable;
+ ds.DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable;
+ ds.DepthTestFunction = genX(vk_to_intel_compare_op)[d->depth_compare_op];
+ ds.StencilTestEnable = d->stencil_test_enable;
+ ds.StencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.fail_op];
+ ds.StencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.pass_op];
+ ds.StencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.depth_fail_op];
+ ds.StencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.front.compare_op];
+ ds.BackfaceStencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.fail_op];
+ ds.BackfaceStencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.pass_op];
+ ds.BackfaceStencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.depth_fail_op];
+ ds.BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.back.compare_op];
+ }
genX(cmd_buffer_enable_pma_fix)(cmd_buffer,
want_depth_pma_fix(cmd_buffer));
@@ -497,41 +490,36 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
ANV_CMD_DIRTY_DYNAMIC_DEPTH_COMPARE_OP |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_TEST_ENABLE |
ANV_CMD_DIRTY_DYNAMIC_STENCIL_OP)) {
- uint32_t dwords[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
- struct GENX(3DSTATE_WM_DEPTH_STENCIL) wm_depth_stencil = {
- GENX(3DSTATE_WM_DEPTH_STENCIL_header),
+ anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_DEPTH_STENCIL), ds) {
+ ds.DoubleSidedStencilEnable = true;
- .StencilTestMask = d->stencil_compare_mask.front & 0xff,
- .StencilWriteMask = d->stencil_write_mask.front & 0xff,
+ ds.StencilTestMask = d->stencil_compare_mask.front & 0xff;
+ ds.StencilWriteMask = d->stencil_write_mask.front & 0xff;
- .BackfaceStencilTestMask = d->stencil_compare_mask.back & 0xff,
- .BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff,
+ ds.BackfaceStencilTestMask = d->stencil_compare_mask.back & 0xff;
+ ds.BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff;
- .StencilReferenceValue = d->stencil_reference.front & 0xff,
- .BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff,
+ ds.StencilReferenceValue = d->stencil_reference.front & 0xff;
+ ds.BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff;
- .StencilBufferWriteEnable =
+ ds.StencilBufferWriteEnable =
(d->stencil_write_mask.front || d->stencil_write_mask.back) &&
- d->stencil_test_enable,
-
- .DepthTestEnable = d->depth_test_enable,
- .DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable,
- .DepthTestFunction = genX(vk_to_intel_compare_op)[d->depth_compare_op],
- .StencilTestEnable = d->stencil_test_enable,
- .StencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.fail_op],
- .StencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.pass_op],
- .StencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.depth_fail_op],
- .StencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.front.compare_op],
- .BackfaceStencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.fail_op],
- .BackfaceStencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.pass_op],
- .BackfaceStencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.depth_fail_op],
- .BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.back.compare_op],
-
- };
- GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, dwords, &wm_depth_stencil);
+ d->stencil_test_enable;
+
+ ds.DepthTestEnable = d->depth_test_enable;
+ ds.DepthBufferWriteEnable = d->depth_test_enable && d->depth_write_enable;
+ ds.DepthTestFunction = genX(vk_to_intel_compare_op)[d->depth_compare_op];
+ ds.StencilTestEnable = d->stencil_test_enable;
+ ds.StencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.fail_op];
+ ds.StencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.pass_op];
+ ds.StencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.front.depth_fail_op];
+ ds.StencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.front.compare_op];
+ ds.BackfaceStencilFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.fail_op];
+ ds.BackfaceStencilPassDepthPassOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.pass_op];
+ ds.BackfaceStencilPassDepthFailOp = genX(vk_to_intel_stencil_op)[d->stencil_op.back.depth_fail_op];
+ ds.BackfaceStencilTestFunction = genX(vk_to_intel_compare_op)[d->stencil_op.back.compare_op];
- anv_batch_emit_merge(&cmd_buffer->batch, dwords,
- pipeline->gfx9.wm_depth_stencil);
+ }
genX(cmd_buffer_enable_pma_fix)(cmd_buffer,
want_stencil_pma_fix(cmd_buffer));
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