Mesa (main): radv: Refactor view index emit to use a per-stage function.

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Module: Mesa
Branch: main
Commit: c4d60df3804ea85d746a4986463b57550e600a28
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c4d60df3804ea85d746a4986463b57550e600a28

Author: Timur Kristóf <timur.kristof at gmail.com>
Date:   Fri Jul 15 11:57:26 2022 +0200

radv: Refactor view index emit to use a per-stage function.

Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>

---

 src/amd/vulkan/radv_cmd_buffer.c | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 8de5205cfb9..32128c90b92 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -6288,20 +6288,24 @@ radv_CmdNextSubpass2(VkCommandBuffer commandBuffer, const VkSubpassBeginInfo *pS
    radv_cmd_buffer_begin_subpass(cmd_buffer, prev_subpass + 1);
 }
 
+static void
+radv_emit_view_index_per_stage(struct radeon_cmdbuf *cs, struct radv_graphics_pipeline *pipeline,
+                               unsigned stage, unsigned index)
+{
+   struct radv_userdata_info *loc = radv_lookup_user_sgpr(&pipeline->base, stage, AC_UD_VIEW_INDEX);
+   if (loc->sgpr_idx == -1)
+      return;
+   uint32_t base_reg = pipeline->base.user_data_0[stage];
+   radeon_set_sh_reg(cs, base_reg + loc->sgpr_idx * 4, index);
+}
+
 static void
 radv_emit_view_index(struct radv_cmd_buffer *cmd_buffer, unsigned index)
 {
    struct radv_graphics_pipeline *pipeline = cmd_buffer->state.graphics_pipeline;
 
-   for (unsigned stage = 0; stage < MESA_VULKAN_SHADER_STAGES; ++stage) {
-      if (!radv_get_shader(&pipeline->base, stage))
-         continue;
-
-      struct radv_userdata_info *loc = radv_lookup_user_sgpr(&pipeline->base, stage, AC_UD_VIEW_INDEX);
-      if (loc->sgpr_idx == -1)
-         continue;
-      uint32_t base_reg = pipeline->base.user_data_0[stage];
-      radeon_set_sh_reg(cmd_buffer->cs, base_reg + loc->sgpr_idx * 4, index);
+   radv_foreach_stage(stage, pipeline->active_stages) {
+      radv_emit_view_index_per_stage(cmd_buffer->cs, pipeline, stage, index);
    }
    if (radv_pipeline_has_gs_copy_shader(&pipeline->base)) {
       struct radv_userdata_info *loc =