Mesa (staging/22.1): nir: introduce and use nir_component_mask

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Module: Mesa
Branch: staging/22.1
Commit: cc1b7b6e5869aadc9df2e3bd39aa015525f09f1b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cc1b7b6e5869aadc9df2e3bd39aa015525f09f1b

Author: Erik Faye-Lund <erik.faye-lund at collabora.com>
Date:   Thu Mar 24 10:36:06 2022 +0100

nir: introduce and use nir_component_mask

The BITFIELD_MASK() macro is intended for using with actual bitfields,
not with nir_component_mask_t. This means we do some extra work to
handle values that are invalid for nir_component_mask_t in the first
place.

This eliminates some warnings on Clang, where the compiler complains
about casting UINT32_MAX to UINT16_MAX.

Reviewed-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15547>

---

 src/compiler/nir/nir.h                          | 7 +++++++
 src/compiler/nir/nir_lower_blend.c              | 2 +-
 src/compiler/nir/nir_lower_input_attachments.c  | 2 +-
 src/compiler/nir/nir_lower_non_uniform_access.c | 2 +-
 src/compiler/nir/nir_lower_subgroups.c          | 2 +-
 src/compiler/nir/nir_opt_copy_prop_vars.c       | 4 ++--
 src/compiler/spirv/spirv_to_nir.c               | 4 ++--
 7 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 29ed6820f3f..fdd17ffc745 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -125,6 +125,13 @@ nir_num_components_valid(unsigned num_components)
            num_components == 16;
 }
 
+static inline nir_component_mask_t
+nir_component_mask(unsigned num_components)
+{
+   assert(nir_num_components_valid(num_components));
+   return (1u << num_components) - 1;
+}
+
 void
 nir_process_debug_variable(void);
 
diff --git a/src/compiler/nir/nir_lower_blend.c b/src/compiler/nir/nir_lower_blend.c
index dc19b02c43a..ecf14e01a07 100644
--- a/src/compiler/nir/nir_lower_blend.c
+++ b/src/compiler/nir/nir_lower_blend.c
@@ -392,7 +392,7 @@ nir_lower_blend_instr(nir_builder *b, nir_instr *instr, void *data)
    blended = nir_color_mask(b, options->rt[rt].colormask, blended, dst);
 
    if (src_num_comps != 4)
-      blended = nir_channels(b, blended, BITFIELD_MASK(src_num_comps));
+      blended = nir_channels(b, blended, nir_component_mask(src_num_comps));
 
    /* Write out the final color instead of the input */
    nir_instr_rewrite_src_ssa(instr, &intr->src[1], blended);
diff --git a/src/compiler/nir/nir_lower_input_attachments.c b/src/compiler/nir/nir_lower_input_attachments.c
index f449d4a151a..c20190e3629 100644
--- a/src/compiler/nir/nir_lower_input_attachments.c
+++ b/src/compiler/nir/nir_lower_input_attachments.c
@@ -140,7 +140,7 @@ try_lower_input_load(nir_function_impl *impl, nir_intrinsic_instr *load,
 
    if (tex->is_sparse) {
       unsigned load_result_size = load->dest.ssa.num_components - 1;
-      unsigned load_result_mask = BITFIELD_MASK(load_result_size);
+      nir_component_mask_t load_result_mask = nir_component_mask(load_result_size);
       nir_ssa_def *res = nir_channels(
          &b, &tex->dest.ssa, load_result_mask | 0x10);
 
diff --git a/src/compiler/nir/nir_lower_non_uniform_access.c b/src/compiler/nir/nir_lower_non_uniform_access.c
index e8d6cc79231..fbdd3720434 100644
--- a/src/compiler/nir/nir_lower_non_uniform_access.c
+++ b/src/compiler/nir/nir_lower_non_uniform_access.c
@@ -72,7 +72,7 @@ nu_handle_compare(const nir_lower_non_uniform_access_options *options,
    nir_component_mask_t channel_mask = ~0;
    if (options->callback)
       channel_mask = options->callback(handle->src, options->callback_data);
-   channel_mask &= BITFIELD_MASK(handle->handle->num_components);
+   channel_mask &= nir_component_mask(handle->handle->num_components);
 
    nir_ssa_def *channels[NIR_MAX_VEC_COMPONENTS];
    for (unsigned i = 0; i < handle->handle->num_components; i++)
diff --git a/src/compiler/nir/nir_lower_subgroups.c b/src/compiler/nir/nir_lower_subgroups.c
index ec64f94edad..ab1d7093474 100644
--- a/src/compiler/nir/nir_lower_subgroups.c
+++ b/src/compiler/nir/nir_lower_subgroups.c
@@ -98,7 +98,7 @@ uint_to_ballot_type(nir_builder *b, nir_ssa_def *value,
     * have enough ballot bits.
     */
    if (value->num_components > num_components)
-      value = nir_channels(b, value, BITFIELD_MASK(num_components));
+      value = nir_channels(b, value, nir_component_mask(num_components));
 
    return value;
 }
diff --git a/src/compiler/nir/nir_opt_copy_prop_vars.c b/src/compiler/nir/nir_opt_copy_prop_vars.c
index 332dea1271c..9f0a67278ee 100644
--- a/src/compiler/nir/nir_opt_copy_prop_vars.c
+++ b/src/compiler/nir/nir_opt_copy_prop_vars.c
@@ -192,7 +192,7 @@ gather_vars_written(struct copy_prop_var_state *state,
                nir_src_as_deref(*nir_get_shader_call_payload_src(intrin));
 
             nir_component_mask_t mask =
-               BITFIELD_MASK(glsl_get_vector_elements(payload->type));
+               nir_component_mask(glsl_get_vector_elements(payload->type));
 
             struct hash_entry *ht_entry =
                _mesa_hash_table_search(written->derefs, payload);
@@ -1151,7 +1151,7 @@ copy_prop_vars_block(struct copy_prop_var_state *state,
          nir_deref_and_path payload = {
             nir_src_as_deref(*nir_get_shader_call_payload_src(intrin)), NULL};
          nir_component_mask_t full_mask =
-            BITFIELD_MASK(glsl_get_vector_elements(payload.instr->type));
+            nir_component_mask(glsl_get_vector_elements(payload.instr->type));
          kill_aliases(state, copies, &payload, full_mask);
          break;
       }
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index 28d84db8bf0..826823c506c 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -3157,7 +3157,7 @@ vtn_handle_texture(struct vtn_builder *b, SpvOp opcode,
       unsigned result_size = glsl_get_vector_elements(ret_type->type);
       dest->elems[0]->def = nir_channel(&b->nb, &instr->dest.ssa, result_size);
       dest->elems[1]->def = nir_channels(&b->nb, &instr->dest.ssa,
-                                         BITFIELD_MASK(result_size));
+                                         nir_component_mask(result_size));
       vtn_push_ssa_value(b, w[2], dest);
    } else {
       vtn_push_nir_ssa(b, w[2], &instr->dest.ssa);
@@ -3580,7 +3580,7 @@ vtn_handle_image(struct vtn_builder *b, SpvOp opcode,
          if (intrin->dest.ssa.bit_size != 32)
             dest->elems[0]->def = nir_u2u32(&b->nb, dest->elems[0]->def);
          dest->elems[1]->def = nir_channels(&b->nb, result,
-                                            BITFIELD_MASK(res_type_size));
+                                            nir_component_mask(res_type_size));
          vtn_push_ssa_value(b, w[2], dest);
       } else {
          vtn_push_nir_ssa(b, w[2], result);