Mesa (main): radv: fix lowering GS intrinsics if NGG is disabled per pipeline

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Module: Mesa
Branch: main
Commit: 5af1409c1b2b9181b16dc80107424876be9be448
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5af1409c1b2b9181b16dc80107424876be9be448

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Apr 12 12:38:24 2022 +0200

radv: fix lowering GS intrinsics if NGG is disabled per pipeline

If NGG is disabled per pipeline for extreme (or suboptimal) geometry
or with transform feedback, make sure to not lower GS intrinsics that
are only needed for NGG GS. This means we have to lower GS intrinsics
later in the compilation process to effectively know if the pipeline
uses NGG.

fossils-db (Navi21):
Totals from 8 (0.01% of 134913) affected shaders:
VGPRs: 512 -> 520 (+1.56%)
CodeSize: 58180 -> 65080 (+11.86%); split: -0.04%, +11.90%
MaxWaves: 128 -> 126 (-1.56%)
Instrs: 10525 -> 11779 (+11.91%); split: -0.05%, +11.96%
Latency: 62941 -> 49428 (-21.47%); split: -21.59%, +0.12%
InvThroughput: 16121 -> 12950 (-19.67%); split: -19.96%, +0.29%
VClause: 122 -> 123 (+0.82%); split: -0.82%, +1.64%
SClause: 130 -> 143 (+10.00%)
Copies: 566 -> 596 (+5.30%); split: -0.35%, +5.65%
Branches: 200 -> 208 (+4.00%)
PreSGPRs: 424 -> 422 (-0.47%)
PreVGPRs: 430 -> 424 (-1.40%); split: -1.63%, +0.23%

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15885>

---

 src/amd/vulkan/radv_pipeline.c | 21 +++++++++++++++++----
 src/amd/vulkan/radv_shader.c   | 13 -------------
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 2a6f54bc45e..e79d0254a43 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -4748,6 +4748,23 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
    /* Determine if shaders uses NGG before linking because it's needed for some NIR pass. */
    radv_fill_shader_info_ngg(pipeline, pipeline_key, stages);
 
+   bool pipeline_has_ngg = (stages[MESA_SHADER_VERTEX].nir && stages[MESA_SHADER_VERTEX].info.is_ngg) ||
+                           (stages[MESA_SHADER_TESS_EVAL].nir && stages[MESA_SHADER_TESS_EVAL].info.is_ngg) ||
+                           (stages[MESA_SHADER_MESH].nir && stages[MESA_SHADER_MESH].info.is_ngg);
+
+   if (stages[MESA_SHADER_GEOMETRY].nir) {
+      unsigned nir_gs_flags = nir_lower_gs_intrinsics_per_stream;
+
+      if (pipeline_has_ngg && !radv_use_llvm_for_stage(device, MESA_SHADER_GEOMETRY)) {
+         /* ACO needs NIR to do some of the hard lifting */
+         nir_gs_flags |= nir_lower_gs_intrinsics_count_primitives |
+                         nir_lower_gs_intrinsics_count_vertices_per_primitive |
+                         nir_lower_gs_intrinsics_overwrite_incomplete;
+      }
+
+      NIR_PASS(_, stages[MESA_SHADER_GEOMETRY].nir, nir_lower_gs_intrinsics, nir_gs_flags);
+   }
+
    radv_link_shaders(pipeline, pipeline_key, stages, optimize_conservatively, *last_vgt_api_stage);
    radv_set_driver_locations(pipeline, stages, *last_vgt_api_stage);
 
@@ -4782,10 +4799,6 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
 
    radv_fill_shader_info(pipeline, pipeline_layout, pipeline_key, stages, *last_vgt_api_stage);
 
-   bool pipeline_has_ngg = (stages[MESA_SHADER_VERTEX].nir && stages[MESA_SHADER_VERTEX].info.is_ngg) ||
-                           (stages[MESA_SHADER_TESS_EVAL].nir && stages[MESA_SHADER_TESS_EVAL].info.is_ngg) ||
-                           (stages[MESA_SHADER_MESH].nir && stages[MESA_SHADER_MESH].info.is_ngg);
-
    if (pipeline_has_ngg) {
       struct gfx10_ngg_info *ngg_info;
 
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index e3f44896d78..50ff6779b85 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -818,19 +818,6 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_pipeline_
       NIR_PASS(_, nir, radv_nir_lower_ray_queries, device);
    }
 
-   if (nir->info.stage == MESA_SHADER_GEOMETRY) {
-      unsigned nir_gs_flags = nir_lower_gs_intrinsics_per_stream;
-
-      if (key->use_ngg && !radv_use_llvm_for_stage(device, stage->stage)) {
-         /* ACO needs NIR to do some of the hard lifting */
-         nir_gs_flags |= nir_lower_gs_intrinsics_count_primitives |
-                         nir_lower_gs_intrinsics_count_vertices_per_primitive |
-                         nir_lower_gs_intrinsics_overwrite_incomplete;
-      }
-
-      NIR_PASS(_, nir, nir_lower_gs_intrinsics, nir_gs_flags);
-   }
-
    static const nir_lower_tex_options tex_options = {
       .lower_txp = ~0,
       .lower_tg4_offsets = true,