Mesa (main): intel/compiler: split handling of 64 bit floats and ints
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Thu Jun 2 23:38:29 UTC 2022
Module: Mesa
Branch: main
Commit: 2256314b08035d42b634f1416f4baf8b21fd2707
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2256314b08035d42b634f1416f4baf8b21fd2707
Author: Paulo Zanoni <paulo.r.zanoni at intel.com>
Date: Mon Mar 21 13:17:30 2022 -0700
intel/compiler: split handling of 64 bit floats and ints
In opt_algebraic(), handle TYPE_DF in a different check than TYPE_Q. We have a
separate flag for each type, use separate checks so platforms where one is true
and the other is not can work properly.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15835>
---
src/intel/compiler/brw_fs.cpp | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 84167496b99..813afcdefa0 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -2550,9 +2550,24 @@ fs_visitor::opt_algebraic()
switch (inst->opcode) {
case BRW_OPCODE_MOV:
if (!devinfo->has_64bit_float &&
- !devinfo->has_64bit_int &&
- (inst->dst.type == BRW_REGISTER_TYPE_DF ||
- inst->dst.type == BRW_REGISTER_TYPE_UQ ||
+ inst->dst.type == BRW_REGISTER_TYPE_DF) {
+ assert(inst->dst.type == inst->src[0].type);
+ assert(!inst->saturate);
+ assert(!inst->src[0].abs);
+ assert(!inst->src[0].negate);
+ const brw::fs_builder ibld(this, block, inst);
+
+ ibld.MOV(subscript(inst->dst, BRW_REGISTER_TYPE_F, 1),
+ subscript(inst->src[0], BRW_REGISTER_TYPE_F, 1));
+ ibld.MOV(subscript(inst->dst, BRW_REGISTER_TYPE_F, 0),
+ subscript(inst->src[0], BRW_REGISTER_TYPE_F, 0));
+
+ inst->remove(block);
+ progress = true;
+ }
+
+ if (!devinfo->has_64bit_int &&
+ (inst->dst.type == BRW_REGISTER_TYPE_UQ ||
inst->dst.type == BRW_REGISTER_TYPE_Q)) {
assert(inst->dst.type == inst->src[0].type);
assert(!inst->saturate);
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