Mesa (main): 26 new commits

Sat Jun 11 11:38:58 UTC 2022

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9490ae55612e3634ea69f8e48c13dfddfd085931
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Jun 9 14:06:12 2022 -0400

    ac/gpu_info: clamp gart_size_kb and vram_size_kb to fix buggy kernel driver
    
    amdgpu returns 12 TB of GTT on Kaveri, which resulted in 0 KB of GTT
    after the conversion to uint32_t, which caused us to report 0 as the UBO
    size, which disabled UBOs and downgraded the driver to OpenGL 3.0.
    
    Fixes: aee8ee17a50 - radeonsi: change max TBO/SSBO sizes again and rework max alloc size
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6642
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bdf3797aeb77a8346c1af6d86f77a7a834cca777
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun May 15 02:17:20 2022 -0400

    ac,radeonsi: don't export null from PS if it has no effect on gfx10+
    
    We just need to pass the uses_discard flag to the epilog.
    
    The hw skips the export anyway. This will hang if SPI registers declare
    an output format or KILL_ENABLE is set because those cases require
    an export with done=1.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4b70887796b3eaf1c372d9240609ea83d5b1f6e
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Jun 9 09:43:12 2022 -0400

    radeonsi: allocate only 1 GDS OA counter for gfx10 NGG streamout
    
    It works with just one.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f48c581f90659183f6d8c3570c76f4510690950
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Wed Jun 8 13:42:33 2022 -0400

    radeonsi: allocate GDS only once per process
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d4bd7cb5b68e81b9c5637855135a767c5857477
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Jun 6 07:26:34 2022 -0400

    winsys/amdgpu: add a kernel GDS management workaround retrying on -ENOMEM
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dfa8dcf80e44b66311513bbb80074da25722c5e3
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Jun 6 05:27:14 2022 -0400

    radeonsi: remove streamout code from shaders if no streamout buffers are bound
    
    This is an optimization using asynchronous shader compilation.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dbbbe73d050920cc149bf99be912221a30920750
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Jun 6 05:11:56 2022 -0400

    radeonsi: fix NGG streamout hang by allocating GDS in the right place
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f900df0713f4d33cdd8d0d963c71668f2b37dec
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Jun 3 19:45:31 2022 -0400

    radeonsi: inline gfx10_emit_streamout_begin/end
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=002e34d860800d5a6ca92bb8ad95bbc65ba535d4
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Jun 3 20:16:05 2022 -0400

    radeonsi: unconditionally enable the streamout overflow query with NGG
    
    It fails some tests, but we need it for gfx11.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f4f98ea502954b1d8ed9926eec6e501da0cbe62
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Jun 3 17:38:09 2022 -0400

    radeonsi: fix a crash in gfx10_sh_query_get_result_resource
    
    If tmp_buffer (in ssbo[1]) is NULL, setting the writable bit causes
    the called function to access the NULL buffer.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc392ff104d688bc30b36cd0b4ef0587750f3194
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Jun 5 06:00:22 2022 -0400

    radeonsi: fix an NGG streamout hang with monolithic shaders
    
    ac_llvm_add_target_dep_function_attr has no effect if the function is
    inlined.
    
    amdgpu-gds-size determines m0 for ds_sub_u32 gds, which hangs if it's 0.
    
    This helps both gfx10 and gfx11, though it will only be used by gfx11
    after we enable streamout.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9f7744cfef6edb7360bcaead1abbf99379f5580
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Jun 9 09:41:52 2022 -0400

    radeonsi: rework how vs_state_bits is set and unpacked
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2342e67701229e36feeee312d2b3ce827cf874a
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Jun 6 04:47:56 2022 -0400

    radeonsi: move GS_STATE bits to the end to make space at the beginning
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c9c7dcb61939ac1d21c0e4ef20e3a1ee13eeadf5
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Jun 6 04:35:40 2022 -0400

    radeonsi: rename and regroup VS_STATE definitions
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=091617002f245d463c3ffc2a3411defb350a63d6
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Jun 6 04:12:48 2022 -0400

    radeonsi: rework how VS_STATE_BITS are set for VS, TES, and GS
    
    We need more GS/NGG bits, so we need to add current_gs_state for that.
    This simplifies the logic in the draw code.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=928e5f240d7a96b1ee54f8a89464df8511efbf90
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Jun 2 17:14:40 2022 -0400

    radeonsi: simplify how pipeline statistic offsets are computed
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=57b7dcd9dbc168d352d424f06d1d24d91f4d7b34
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Jun 2 17:18:43 2022 -0400

    radeonsi: add BREAK_BATCH at the beginning of IBs
    
    to fix possible issues if the previous IB comes from a different app
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=eea46094ff875e952588775fe2613bb29f908117
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue May 24 11:07:04 2022 -0400

    radeonsi: set INTERPOLATE_COMP_Z to 0 to work around an EQAA bug
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f3c74ddfb7289f729cb719e777b2c07ca1e79ee
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Jun 9 10:21:11 2022 -0400

    radeonsi: determine DB_SHADER_CONTROL in si_shader_ps
    
    This is cleaner and more flexible.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e879dcedd1da32de8046d19996e059d5dc01088
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon May 16 09:49:27 2022 -0400

    radeonsi: restructure PS no-export fixups
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cbea71aababc68c2a91587fac00972f2ba10c3a
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun May 15 02:12:18 2022 -0400

    radeonsi: fix polygon stippling without color and Z outputs (v2)
    
    We need to handle the fact that it kills pixels.
    
    v2: also update si_update_ps_inputs_read_or_disabled
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=56359e9f6e46b224754e1993ad63ceded1ff211c
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Jun 5 06:13:52 2022 -0400

    radeonsi: remove unused dword from wait_mem_scratch
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e0d34ce98725420ef0156186fc00f1c4d00eb80
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Jun 5 06:15:53 2022 -0400

    radeonsi: fix uninitialized wait_mem_scratch_tmz
    
    The initialization was dead code because it's allocated later.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=705e9af29a854359ca883dff11f0f84618cab430
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Jun 5 06:57:43 2022 -0400

    radeonsi: don't use info.gs.invocations if it's not GS
    
    It's a union, which makes gs.invocations undefined for VS and TES.
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b9cd2469ea55a9239c29a9ca6dd2e24e9190f07
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Jun 6 02:46:54 2022 -0400

    radeonsi: print LDS size in bytes
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8edafaa25c5d649af6c016a61383d784a1ebb078
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sat May 14 22:16:16 2022 -0400

    winsys/amdgpu: use AMDGPU_IB_FLAG_PREAMBLE for the CS preamble on gfx10+
    
    This skips the preamble for following IBs if the queue receives IBs from
    the same context back-to-back. This eliminates VGT_FLUSH (for tess and
    legacy GS) and PS_PARTIAL_FLUSH (for gfx11) in those cases if the preamble
    contains them.
    
    v2: only use this on gfx10+ due to stability issues on Stoney and limited
        testing
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>