Mesa (main): zink: check for pending clears to determine write status of zs attachments

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: b240be28e3193e83632848bb32eb1013bddfc285
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b240be28e3193e83632848bb32eb1013bddfc285

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Tue Jun 14 13:14:56 2022 -0400

zink: check for pending clears to determine write status of zs attachments

as @Venemo discovered, zs layouts were being incorrectly set to readonly
in the case where the attachment was only used for an explicit clear,
so ensure that gets taken into account

cc: mesa-stable

fixes (radv):
dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_clear
dEQP-GLES31.functional.stencil_texturing.render.depth32f_stencil8_clear

Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17033>

---

 src/gallium/drivers/zink/ci/zink-radv-fails.txt | 15 ---------------
 src/gallium/drivers/zink/zink_render_pass.c     |  6 ++++--
 2 files changed, 4 insertions(+), 17 deletions(-)

diff --git a/src/gallium/drivers/zink/ci/zink-radv-fails.txt b/src/gallium/drivers/zink/ci/zink-radv-fails.txt
index 2cf7b1c10ba..13794cde5b6 100644
--- a/src/gallium/drivers/zink/ci/zink-radv-fails.txt
+++ b/src/gallium/drivers/zink/ci/zink-radv-fails.txt
@@ -6,21 +6,6 @@ KHR-GL46.sparse_texture_tests.SparseTextureCommitment,Fail
 # amd issue #6305
 KHR-GL46.shader_ballot_tests.ShaderBallotFunctionRead,Fail
 
-# RADV regression #6597
-dEQP-GLES31.functional.stencil_texturing.render.depth24_stencil8_clear,Fail
-dEQP-GLES31.functional.stencil_texturing.render.depth32f_stencil8_clear,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_index_array_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_index_array_as_vertex_texture_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_fragment_texture.buffersubdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_index_array_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_index_array_as_vertex_texture_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_vertex_texture_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_array_as_vertex_texture_as_fragment_texture.buffersubdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_texture_as_fragment_texture.bufferdata,Fail
-dEQP-GLES31.functional.texture.texture_buffer.render_modify.as_vertex_texture_as_fragment_texture.buffersubdata,Fail
-
-
 dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_center,Fail
 dEQP-GLES2.functional.clipping.line.wide_line_clip_viewport_corner,Fail
 dEQP-GLES2.functional.clipping.point.wide_point_clip,Fail
diff --git a/src/gallium/drivers/zink/zink_render_pass.c b/src/gallium/drivers/zink/zink_render_pass.c
index dfa807b582b..1332689456e 100644
--- a/src/gallium/drivers/zink/zink_render_pass.c
+++ b/src/gallium/drivers/zink/zink_render_pass.c
@@ -328,9 +328,11 @@ zink_init_zs_attachment(struct zink_context *ctx, struct zink_rt_attrib *rt)
                                     ctx->gfx_stages[PIPE_SHADER_FRAGMENT]->nir->info.outputs_written : 0;
    bool needs_write_z = (ctx->dsa_state && ctx->dsa_state->hw_state.depth_write) ||
                        outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH);
-   needs_write_z |= transient || rt->clear_color;
+   needs_write_z |= transient || rt->clear_color ||
+                    (zink_fb_clear_enabled(ctx, PIPE_MAX_COLOR_BUFS) && (zink_fb_clear_element(fb_clear, 0)->zs.bits & PIPE_CLEAR_DEPTH));
 
-   bool needs_write_s = rt->clear_stencil || outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL);
+   bool needs_write_s = rt->clear_stencil || (outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) ||
+                        (zink_fb_clear_enabled(ctx, PIPE_MAX_COLOR_BUFS) && (zink_fb_clear_element(fb_clear, 0)->zs.bits & PIPE_CLEAR_STENCIL));
    if (!needs_write_z && (!ctx->dsa_state || !ctx->dsa_state->base.depth_enabled))
       /* depth sample, stencil write */
       rt->mixed_zs = needs_write_s && zsbuf->bind_count[0];