Mesa (main): freedreno/a6xx: Support more 3-component formats

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Module: Mesa
Branch: main
Commit: 6dfabab08f3e062125a353e6597fa19c22894207
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6dfabab08f3e062125a353e6597fa19c22894207

Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Fri Jun 10 17:24:39 2022 +0200

freedreno/a6xx: Support more 3-component formats

These should be trivially enableable. This gets us some test coverage on
turnip because there are no tests of RGB32 texel buffers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16980>

---

 src/freedreno/fdl/fd6_format_table.c            | 18 +++++++++---------
 src/gallium/drivers/freedreno/a6xx/fd6_screen.c |  3 ++-
 2 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/src/freedreno/fdl/fd6_format_table.c b/src/freedreno/fdl/fd6_format_table.c
index 486588210cd..5e2cfa69ce2 100644
--- a/src/freedreno/fdl/fd6_format_table.c
+++ b/src/freedreno/fdl/fd6_format_table.c
@@ -136,10 +136,10 @@ static const struct fd6_format formats[PIPE_FORMAT_COUNT] = {
    _TC(A4B4G4R4_UNORM, 4_4_4_4_UNORM,           XYZW),
 
    /* 24-bit */
-   V__(R8G8B8_UNORM,   8_8_8_UNORM,             WZYX),
-   V__(R8G8B8_SNORM,   8_8_8_SNORM,             WZYX),
-   V__(R8G8B8_UINT,    8_8_8_UINT,              WZYX),
-   V__(R8G8B8_SINT,    8_8_8_SINT,              WZYX),
+   VT_(R8G8B8_UNORM,   8_8_8_UNORM,             WZYX),
+   VT_(R8G8B8_SNORM,   8_8_8_SNORM,             WZYX),
+   VT_(R8G8B8_UINT,    8_8_8_UINT,              WZYX),
+   VT_(R8G8B8_SINT,    8_8_8_SINT,              WZYX),
    V__(R8G8B8_USCALED, 8_8_8_UINT,              WZYX),
    V__(R8G8B8_SSCALED, 8_8_8_SINT,              WZYX),
 
@@ -235,13 +235,13 @@ static const struct fd6_format formats[PIPE_FORMAT_COUNT] = {
    _TC(Z24_UNORM_S8_UINT_AS_R8G8B8A8, Z24_UNORM_S8_UINT_AS_R8G8B8A8, WZYX),
 
    /* 48-bit */
-   V__(R16G16B16_UNORM,   16_16_16_UNORM,       WZYX),
-   V__(R16G16B16_SNORM,   16_16_16_SNORM,       WZYX),
-   V__(R16G16B16_UINT,    16_16_16_UINT,        WZYX),
-   V__(R16G16B16_SINT,    16_16_16_SINT,        WZYX),
+   VT_(R16G16B16_UNORM,   16_16_16_UNORM,       WZYX),
+   VT_(R16G16B16_SNORM,   16_16_16_SNORM,       WZYX),
+   VT_(R16G16B16_UINT,    16_16_16_UINT,        WZYX),
+   VT_(R16G16B16_SINT,    16_16_16_SINT,        WZYX),
    V__(R16G16B16_USCALED, 16_16_16_UINT,        WZYX),
    V__(R16G16B16_SSCALED, 16_16_16_SINT,        WZYX),
-   V__(R16G16B16_FLOAT,   16_16_16_FLOAT,       WZYX),
+   VT_(R16G16B16_FLOAT,   16_16_16_FLOAT,       WZYX),
 
    /* 64-bit */
    VTC(R16G16B16A16_UNORM,   16_16_16_16_UNORM, WZYX),
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_screen.c b/src/gallium/drivers/freedreno/a6xx/fd6_screen.c
index 1085c16d08d..d2d73da900e 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_screen.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_screen.c
@@ -85,7 +85,8 @@ fd6_screen_is_format_supported(struct pipe_screen *pscreen,
 
    if ((usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE)) &&
        has_tex &&
-       (target == PIPE_BUFFER || util_format_get_blocksize(format) != 12)) {
+       (target == PIPE_BUFFER ||
+        util_is_power_of_two_or_zero(util_format_get_blocksize(format)))) {
       retval |= usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE);
    }