Mesa (staging/22.1): zink: cap driver inlining using ssa allocation limit

[GitLab Mirror]

Module: Mesa
Branch: staging/22.1
Commit: 77e02243c73be6cf75cb444b9152c23ff271c28b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=77e02243c73be6cf75cb444b9152c23ff271c28b

Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date:   Fri Jun 10 12:43:45 2022 -0400

zink: cap driver inlining using ssa allocation limit

usually inlining is optimal for cpu drivers since the majority of
time is spent in the shaders, and any amount of reduction to shader code
will be optimal

if, however, the shaders are still really big after inlining, this improvement
will be negated by the insane amount of time spent doing stupid llvm optimizer
passes, so check post-inline size to see whether it exceeds a size threshold

lavapipe release build - 1700% improvement
* spec at arb_tessellation_shader@execution at variable-indexing@tcs-output-array-vec4-index-rd-after-barrier

before: 142.15s user 0.42s system 99% cpu 2:23.14 total

after: 8.60s user 0.07s system 99% cpu 8.677 total

fixes #6647

Reviewed-by: Adam Jackson <ajax at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16977>

---

 src/gallium/drivers/zink/zink_compiler.c | 6 ++++++
 src/gallium/drivers/zink/zink_compiler.h | 6 ++++++
 src/gallium/drivers/zink/zink_program.c  | 2 +-
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c
index 694b9ad89bb..ed532b58b4d 100644
--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -1407,6 +1407,10 @@ zink_shader_compile(struct zink_screen *screen, struct zink_shader *zs, nir_shad
       /* This must be done again. */
       NIR_PASS_V(nir, nir_io_add_const_offset_to_base, nir_var_shader_in |
                                                        nir_var_shader_out);
+
+      nir_function_impl *impl = nir_shader_get_entrypoint(nir);
+      if (impl->ssa_alloc > ZINK_ALWAYS_INLINE_LIMIT)
+         zs->can_inline = false;
    } else if (need_optimize)
       optimize_nir(nir);
    prune_io(nir);
@@ -2192,6 +2196,8 @@ zink_shader_create(struct zink_screen *screen, struct nir_shader *nir,
       }
    }
 
+   ret->can_inline = true;
+
    return ret;
 }
 
diff --git a/src/gallium/drivers/zink/zink_compiler.h b/src/gallium/drivers/zink/zink_compiler.h
index aa7ca91bf4e..cae9a8b05a3 100644
--- a/src/gallium/drivers/zink/zink_compiler.h
+++ b/src/gallium/drivers/zink/zink_compiler.h
@@ -38,6 +38,11 @@
 #define ZINK_WORKGROUP_SIZE_Y 2
 #define ZINK_WORKGROUP_SIZE_Z 3
 
+/* stop inlining shaders if they have >limit ssa vals after inlining:
+ * recompile time isn't worth the inline
+ */
+#define ZINK_ALWAYS_INLINE_LIMIT 1500
+
 struct pipe_screen;
 struct zink_context;
 struct zink_screen;
@@ -89,6 +94,7 @@ struct zink_shader {
    uint32_t ubos_used; // bitfield of which ubo indices are used
    uint32_t ssbos_used; // bitfield of which ssbo indices are used
    bool bindless;
+   bool can_inline;
    struct spirv_shader *spirv;
 
    simple_mtx_t lock;
diff --git a/src/gallium/drivers/zink/zink_program.c b/src/gallium/drivers/zink/zink_program.c
index 29dffd49589..77f2fb6ad8f 100644
--- a/src/gallium/drivers/zink/zink_program.c
+++ b/src/gallium/drivers/zink/zink_program.c
@@ -106,7 +106,7 @@ get_shader_module_for_stage(struct zink_context *ctx, struct zink_screen *screen
    }
    if (ctx && zs->nir->info.num_inlinable_uniforms &&
        ctx->inlinable_uniforms_valid_mask & BITFIELD64_BIT(pstage)) {
-      if (screen->is_cpu || prog->inlined_variant_count[pstage] < ZINK_MAX_INLINED_VARIANTS)
+      if (zs->can_inline && (screen->is_cpu || prog->inlined_variant_count[pstage] < ZINK_MAX_INLINED_VARIANTS))
          inline_size = zs->nir->info.num_inlinable_uniforms;
       else
          key->inline_uniforms = false;