Mesa (main): pan/va: Include BLEND for va_swap_12

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Module: Mesa
Branch: main
Commit: b48933d6411a379c128b31174474949046a6915c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b48933d6411a379c128b31174474949046a6915c

Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date:   Thu Jun 16 15:46:22 2022 -0400

pan/va: Include BLEND for va_swap_12

This helps "contain the crazy" and avoids special casing BLEND in compiler
passes. The Valhall instruction is roughly the same as its Bifrost counterpart,
as long as we fix up the source order (as we already do for bitwise operations)
everything works out.

Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17091>

---

 src/panfrost/bifrost/valhall/va_lower_split_64bit.c | 10 ----------
 src/panfrost/bifrost/valhall/valhall.h              |  5 +++++
 2 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/src/panfrost/bifrost/valhall/va_lower_split_64bit.c b/src/panfrost/bifrost/valhall/va_lower_split_64bit.c
index bc315221f86..e193ab32109 100644
--- a/src/panfrost/bifrost/valhall/va_lower_split_64bit.c
+++ b/src/panfrost/bifrost/valhall/va_lower_split_64bit.c
@@ -34,16 +34,6 @@
 static void
 lower_split_src(bi_context *ctx, bi_instr *I, unsigned s)
 {
-   /* Fix up for mismatch between IR and Valhall BLEND */
-   if (I->op == BI_OPCODE_BLEND) {
-      /* Only the blend descriptor needs lowering */
-      if (s != 1)
-         return;
-
-      /* But it is in a different place! */
-      s = 2;
-   }
-
    /* Skip sources that are already split properly */
    bi_index offset_fau = I->src[s];
    offset_fau.offset++;
diff --git a/src/panfrost/bifrost/valhall/valhall.h b/src/panfrost/bifrost/valhall/valhall.h
index a634a1487eb..df14129ed66 100644
--- a/src/panfrost/bifrost/valhall/valhall.h
+++ b/src/panfrost/bifrost/valhall/valhall.h
@@ -112,12 +112,17 @@ valhall_opcodes[BI_NUM_OPCODES];
 /* Bifrost specifies the source of bitwise operations as (A, B, shift), but
  * Valhall specifies (A, shift, B). We follow Bifrost conventions in the
  * compiler, so normalize.
+ *
+ * Bifrost specifies BLEND as staging + (coverage, blend descriptor), but
+ * Valhall specifies staging + (blend descriptor, coverage). Given we put
+ * staging sources first, this works out to the same swap as bitwise ops.
  */
 
 static inline bool
 va_swap_12(enum bi_opcode op)
 {
    switch (op) {
+   case BI_OPCODE_BLEND:
    case BI_OPCODE_LSHIFT_AND_I32:
    case BI_OPCODE_LSHIFT_AND_V2I16:
    case BI_OPCODE_LSHIFT_AND_V4I8: