Mesa (main): freedreno/ir3: Disable image/ssbo 16-bit conversion folding pre-a6xx.

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Module: Mesa
Branch: main
Commit: 6cf2b24eafe9335b9eb605f252b692dad6215dfe
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6cf2b24eafe9335b9eb605f252b692dad6215dfe

Author: Emma Anholt <emma at anholt.net>
Date:   Tue Jun  7 10:53:57 2022 -0700

freedreno/ir3: Disable image/ssbo 16-bit conversion folding pre-a6xx.

I don't see it in blob dumps, and the reordered args tripped up validation.

Fixes: 49dc60efa1df ("freedreno/ir3: Fold 16-bit conversions into image load/store src/dsts.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17004>

---

 src/freedreno/ir3/ir3_nir.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index 1fbc113a8ad..519a02c0dac 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -755,7 +755,9 @@ ir3_nir_lower_variant(struct ir3_shader_variant *so, nir_shader *s)
             (1 << nir_tex_src_ddy),
             ~0);
 
-         OPT(s, nir_fold_16bit_image_load_store_conversions);
+         /* blob dumps have no half regs on pixel 2's ldib or stib, so only enable for a6xx+. */
+         if (so->compiler->gen >= 6)
+            OPT(s, nir_fold_16bit_image_load_store_conversions);
 
          /* Now that we stripped off the 16-bit conversions, legalize so that we
           * don't have a mix of 16- and 32-bit args that will need to be