Mesa (staging/22.1): nir: i32csel opcodes should compare with integer zero

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Module: Mesa
Branch: staging/22.1
Commit: ccad18ff9ed6771751f259ea009c12972c3bffec
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ccad18ff9ed6771751f259ea009c12972c3bffec

Author: Ian Romanick <ian.d.romanick at intel.com>
Date:   Wed Jun 15 09:21:10 2022 -0700

nir: i32csel opcodes should compare with integer zero

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa at collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand at collabora.com>
Noticed-by: Georg Lehmann <dadschoorse at gmail.com>
Fixes: 0f5b3c37c5d ("nir: Add opcodes for fused comp + csel and optimizations")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17048>
(cherry picked from commit ccd18ec4f34b6f1407fb7c1671de8c789f33fa1f)

---

 .pick_status.json               | 2 +-
 src/compiler/nir/nir_opcodes.py | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index c63b84d0eda..9481b740c65 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -328,7 +328,7 @@
         "description": "nir: i32csel opcodes should compare with integer zero",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "0f5b3c37c5d757f6ffe994bae24071c0462bb13f"
     },
diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index a604451d3df..bb0c8dc7be6 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -1019,8 +1019,8 @@ opcode("b16csel", 0, tuint, [0, 0, 0],
 opcode("b32csel", 0, tuint, [0, 0, 0],
        [tbool32, tuint, tuint], False, "", "src0 ? src1 : src2")
 
-triop("i32csel_gt", tint32, "", "(src0 > 0.0f) ? src1 : src2")
-triop("i32csel_ge", tint32, "", "(src0 >= 0.0f) ? src1 : src2")
+triop("i32csel_gt", tint32, "", "(src0 > 0) ? src1 : src2")
+triop("i32csel_ge", tint32, "", "(src0 >= 0) ? src1 : src2")
 
 triop("fcsel_gt", tfloat32, "", "(src0 > 0.0f) ? src1 : src2")
 triop("fcsel_ge", tfloat32, "", "(src0 >= 0.0f) ? src1 : src2")