Mesa (main): freedreno: document GRAS_UNKNOWN_810A

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Module: Mesa
Branch: main
Commit: 70f1d70ddd785361d989fcc565a675df173a1d82
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=70f1d70ddd785361d989fcc565a675df173a1d82

Author: Danylo Piliaiev <dpiliaiev at igalia.com>
Date:   Thu May 19 20:32:57 2022 +0300

freedreno: document GRAS_UNKNOWN_810A

Signed-off-by: Danylo Piliaiev <dpiliaiev at igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16251>

---

 src/freedreno/registers/adreno/a6xx.xml       | 8 ++++----
 src/freedreno/registers/adreno/adreno_pm4.xml | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/freedreno/registers/adreno/a6xx.xml b/src/freedreno/registers/adreno/a6xx.xml
index 5cf4495ba65..8771fad1855 100644
--- a/src/freedreno/registers/adreno/a6xx.xml
+++ b/src/freedreno/registers/adreno/a6xx.xml
@@ -1857,10 +1857,10 @@ to upconvert to 32b float internally?
 	<reg32 offset="0x8109" name="GRAS_SAMPLE_CNTL">
 		<bitfield name="PER_SAMP_MODE" pos="0" type="boolean"/>
 	</reg32>
-	<reg32 offset="0x810a" name="GRAS_UNKNOWN_810A">
-		<bitfield name="UNK0" low="0" high="10" type="uint"/>
-		<bitfield name="UNK16" low="16" high="26" type="uint"/>
-		<bitfield name="UNK28" low="28" high="31" type="uint"/>
+	<reg32 offset="0x810a" name="GRAS_LRZ_DEPTH_VIEW">
+		<bitfield name="BASE_LAYER" low="0" high="10" type="uint"/>
+		<bitfield name="LAYER_COUNT" low="16" high="26" type="uint"/>
+		<bitfield name="BASE_MIP_LEVEL" low="28" high="31" type="uint"/>
 	</reg32>
 
 	<!-- 0x810b-0x810f invalid -->
diff --git a/src/freedreno/registers/adreno/adreno_pm4.xml b/src/freedreno/registers/adreno/adreno_pm4.xml
index df274115943..a29094e6c36 100644
--- a/src/freedreno/registers/adreno/adreno_pm4.xml
+++ b/src/freedreno/registers/adreno/adreno_pm4.xml
@@ -1777,12 +1777,12 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
 		<value name="UNK_EVENT_WRITE" value="0x4"/>
 		<doc>
 			Tracks GRAS_LRZ_CNTL::GREATER, GRAS_LRZ_CNTL::DIR, and
-			GRAS_UNKNOWN_810A with previous values, and if one of
+			GRAS_LRZ_DEPTH_VIEW with previous values, and if one of
 			the following is true:
 			- GRAS_LRZ_CNTL::GREATER has changed
 			- GRAS_LRZ_CNTL::DIR has changed, the old value is not
 			  CUR_DIR_GE, and the new value is not CUR_DIR_DISABLED
-			- GRAS_UNKNOWN_810A has changed
+			- GRAS_LRZ_DEPTH_VIEW has changed
 			then it does a LRZ_FLUSH with GRAS_LRZ_CNTL::ENABLE
 			forced to 1.
 			Only exists in a650_sqe.fw.