Mesa (staging/22.1): broadcom/compiler: fix postponed TMU spills with multiple writes

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Module: Mesa
Branch: staging/22.1
Commit: 63ac4309e10fc0d487c4845c5e40ff65a8b1c66d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=63ac4309e10fc0d487c4845c5e40ff65a8b1c66d

Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Wed Jun 22 08:29:42 2022 +0200

broadcom/compiler: fix postponed TMU spills with multiple writes

If we are spilling a register that is used in the middle of a TMU
sequence, we postpone the spill until the TMU sequence finishes,
at which point we inject the spill and rewrite the original
instruction to write to the new temp.

However, this doesn't work if the register is written multiple
times during the TMU sequence. In that scenario, we need to ensure
that all writes are rewritten to use the new temp, not just the last
one.

Cc: mesa-stable
Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17201>
(cherry picked from commit 98420408d0bd0d339c723d6de544a668b2b8f9b6)

---

 .pick_status.json                             |  2 +-
 src/broadcom/compiler/vir_register_allocate.c | 17 ++++++++++++-----
 2 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index f4b6a8144b0..34547cbb59b 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -472,7 +472,7 @@
         "description": "broadcom/compiler: fix postponed TMU spills with multiple writes",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/broadcom/compiler/vir_register_allocate.c b/src/broadcom/compiler/vir_register_allocate.c
index 0fd52a988d3..09107523fb1 100644
--- a/src/broadcom/compiler/vir_register_allocate.c
+++ b/src/broadcom/compiler/vir_register_allocate.c
@@ -676,12 +676,19 @@ v3d_spill_reg(struct v3d_compile *c, int *acc_nodes, int spill_temp)
                                          * with a new temp though.
                                          */
                                         if (start_of_tmu_sequence) {
+                                                if (postponed_spill) {
+                                                        postponed_spill->dst =
+                                                                postponed_spill_temp;
+                                                }
+                                                if (!postponed_spill ||
+                                                    vir_get_cond(inst) == V3D_QPU_COND_NONE) {
+                                                        postponed_spill_temp =
+                                                                vir_get_temp(c);
+                                                        add_node(c,
+                                                                 postponed_spill_temp.index,
+                                                                 c->nodes.info[spill_node].class_bits);
+                                                }
                                                 postponed_spill = inst;
-                                                postponed_spill_temp =
-                                                        vir_get_temp(c);
-                                                add_node(c,
-                                                         postponed_spill_temp.index,
-                                                         c->nodes.info[spill_node].class_bits);
                                         } else {
                                                 v3d_emit_tmu_spill(c, inst,
                                                                    postponed_spill_temp,