Mesa (staging/22.0): Revert "pan/bi: Lower swizzles on CSEL.i32/MUX.i32"

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Module: Mesa
Branch: staging/22.0
Commit: f0939d58d021dfdea5ce779b872e649bd09bc353
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0939d58d021dfdea5ce779b872e649bd09bc353

Author: Dylan Baker <dylan.c.baker at intel.com>
Date:   Tue Mar  8 09:56:49 2022 -0800

Revert "pan/bi: Lower swizzles on CSEL.i32/MUX.i32"

This reverts commit e8d25b50c96e2a706092c26933dd02d5005ea4d9.

---

 .pick_status.json                       |  2 +-
 src/panfrost/bifrost/bi_lower_swizzle.c | 13 -------------
 src/panfrost/ci/panfrost-g52-fails.txt  |  7 +++++++
 3 files changed, 8 insertions(+), 14 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 8e1e4514ac4..310d3851095 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -3478,7 +3478,7 @@
         "description": "pan/bi: Lower swizzles on CSEL.i32/MUX.i32",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 1,
+        "resolution": 0,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/panfrost/bifrost/bi_lower_swizzle.c b/src/panfrost/bifrost/bi_lower_swizzle.c
index b7549b0f385..a0d5917b218 100644
--- a/src/panfrost/bifrost/bi_lower_swizzle.c
+++ b/src/panfrost/bifrost/bi_lower_swizzle.c
@@ -50,19 +50,6 @@ bi_lower_swizzle_16(bi_context *ctx, bi_instr *ins, unsigned src)
          * derivatives, which might require swizzle lowering */
         case BI_OPCODE_CLPER_I32:
         case BI_OPCODE_CLPER_V6_I32:
-
-        /* Similarly, CSEL.i32 consumes a boolean as a 32-bit argument. If the
-         * boolean is implemented as a 16-bit integer, the swizzle is needed
-         * for correct operation if the instruction producing the 16-bit
-         * boolean does not replicate to both halves of the containing 32-bit
-         * register. As such, we may need to lower a swizzle.
-         *
-         * This is a silly hack. Ideally, code gen would be smart enough to
-         * avoid this case (by replicating). In practice, silly hardware design
-         * decisions force our hand here.
-         */
-        case BI_OPCODE_MUX_I32:
-        case BI_OPCODE_CSEL_I32:
             break;
 
         case BI_OPCODE_IADD_V2S16:
diff --git a/src/panfrost/ci/panfrost-g52-fails.txt b/src/panfrost/ci/panfrost-g52-fails.txt
index 4c2bf39f4f7..e70c8cbc49f 100644
--- a/src/panfrost/ci/panfrost-g52-fails.txt
+++ b/src/panfrost/ci/panfrost-g52-fails.txt
@@ -19,6 +19,7 @@ glx at glx-visuals-stencil -pixmap,Crash
 shaders at glsl-bug-110796,Fail
 shaders at glsl-uniform-interstage-limits@subdivide 5,Crash
 shaders at glsl-uniform-interstage-limits@subdivide 5- statechanges,Crash
+shaders at glsl-vs-if-bool,Fail
 shaders at point-vertex-id divisor,Fail
 shaders at point-vertex-id gl_instanceid divisor,Fail
 shaders at point-vertex-id gl_instanceid,Fail
@@ -98,6 +99,12 @@ spec at arb_pixel_buffer_object@texsubimage cube_map_array pbo,Fail
 spec at arb_point_sprite@arb_point_sprite-checkerboard,Fail
 spec at arb_point_sprite@arb_point_sprite-mipmap,Fail
 spec at arb_provoking_vertex@arb-provoking-vertex-render,Fail
+spec at arb_sample_shading@builtin-gl-sample-id 0,Fail
+spec at arb_sample_shading@builtin-gl-sample-id 2,Fail
+spec at arb_sample_shading@builtin-gl-sample-id 4,Fail
+spec at arb_sample_shading@builtin-gl-sample-mask 0,Fail
+spec at arb_sample_shading@builtin-gl-sample-mask 2,Fail
+spec at arb_sample_shading@builtin-gl-sample-mask 4,Fail
 spec at arb_sample_shading@samplemask 2 at 0.250000 mask_in_one,Fail
 spec at arb_sample_shading@samplemask 2 at 0.500000 mask_in_one,Fail
 spec at arb_sample_shading@samplemask 2 at 1.000000 mask_in_one,Fail