Mesa (main): anv: Allow MSAA resolve with different numbers of planes
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Fri Mar 11 22:51:08 UTC 2022
Module: Mesa
Branch: main
Commit: d65dbe8018923e3a405b362c92a21caa30e66e83
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d65dbe8018923e3a405b362c92a21caa30e66e83
Author: Jason Ekstrand <jason.ekstrand at collabora.com>
Date: Fri Feb 11 23:41:03 2022 -0600
anv: Allow MSAA resolve with different numbers of planes
The Vulkan spec for VK_KHR_depth_stencil_resolve allows a format
mismatch between the primary attachment and the resolve attachment
within certain limits. In particular,
VUID-VkSubpassDescriptionDepthStencilResolve-pDepthStencilResolveAttachment-03181
If pDepthStencilResolveAttachment is not NULL and does not have the
value VK_ATTACHMENT_UNUSED and VkFormat of
pDepthStencilResolveAttachment has a depth component, then the
VkFormat of pDepthStencilAttachment must have a depth component with
the same number of bits and numerical type
VUID-VkSubpassDescriptionDepthStencilResolve-pDepthStencilResolveAttachment-03182
If pDepthStencilResolveAttachment is not NULL and does not have the
value VK_ATTACHMENT_UNUSED, and VkFormat of
pDepthStencilResolveAttachment has a stencil component, then the
VkFormat of pDepthStencilAttachment must have a stencil component
with the same number of bits and numerical type
So you can resolve from a depth/stencil format to a depth-only or
stencil-only format so long as the number of bits matches.
Unfortunately, this has never been tested because the CTS tests which
purport to test this are broken and actually test with a destination
combined depth/stencil format.
Fixes: 5e4f9ea363a6 ("anv: Implement VK_KHR_depth_stencil_resolve")
Reviewed-by: Ivan Briano <ivan.briano at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15333>
---
src/intel/vulkan/anv_blorp.c | 1 -
src/intel/vulkan/genX_cmd_buffer.c | 2 ++
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index e16aaa75f55..ebd1edc20ce 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -1403,7 +1403,6 @@ anv_image_msaa_resolve(struct anv_cmd_buffer *cmd_buffer,
assert(src_image->vk.samples > 1);
assert(dst_image->vk.image_type == VK_IMAGE_TYPE_2D);
assert(dst_image->vk.samples == 1);
- assert(src_image->n_planes == dst_image->n_planes);
struct blorp_surf src_surf, dst_surf;
get_blorp_surf_for_anv_image(cmd_buffer->device, src_image, aspect,
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index f5534c04313..21eac79bf35 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -7011,6 +7011,7 @@ cmd_buffer_resolve_attachments(struct anv_cmd_buffer *cmd_buffer,
struct anv_attachment_state *dst_state = &attachments[dst_att];
if ((src_iview->image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
+ (dst_iview->image->vk.aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
subpass->depth_resolve_mode != VK_RESOLVE_MODE_NONE_KHR) {
/* MSAA resolves sample from the source attachment. Transition the
@@ -7077,6 +7078,7 @@ cmd_buffer_resolve_attachments(struct anv_cmd_buffer *cmd_buffer,
}
if ((src_iview->image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
+ (dst_iview->image->vk.aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
subpass->stencil_resolve_mode != VK_RESOLVE_MODE_NONE_KHR) {
src_state->current_stencil_layout = VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL;
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