Mesa (staging/22.0): Revert "anv: Disable CCS_E for some 8/16bpp copies on TGL+"

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Module: Mesa
Branch: staging/22.0
Commit: 9f11d715400e222b70aa0c9387dc3a1ad44336a3
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f11d715400e222b70aa0c9387dc3a1ad44336a3

Author: Nanley Chery <nanley.g.chery at intel.com>
Date:   Wed Mar 16 14:25:28 2022 -0700

Revert "anv: Disable CCS_E for some 8/16bpp copies on TGL+"

This reverts commit d68b2db89ca38f3f6c0d3ebd65945c471d864d58.

With this change, no regressions have been observed with the
dEQP-VK.synchronization* test group. There are regressions with
dEQP-VK.drm_format_modifiers.export_import.*, but those have been
root-caused to be test issues (see 3575).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6125
Fixes: 57445adc891 ("anv: Re-enable CCS_E on TGL+")
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15420>
(cherry picked from commit e2f0c859c2b8092bef58ee396ab1d5b6f18d5eb5)

---

 .pick_status.json            |  2 +-
 src/intel/vulkan/anv_image.c | 14 --------------
 2 files changed, 1 insertion(+), 15 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 5d21be70576..56ab62b698d 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -2556,7 +2556,7 @@
         "description": "Revert \"anv: Disable CCS_E for some 8/16bpp copies on TGL+\"",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "because_sha": "57445adc89186fcadc1e6006d1aa32768b26556b"
     },
     {
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index c844f292a8b..07af992818c 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -2029,20 +2029,6 @@ anv_layout_to_aux_state(const struct intel_device_info * const devinfo,
    bool aux_supported = true;
    bool clear_supported = isl_aux_usage_has_fast_clears(aux_usage);
 
-   const struct isl_format_layout *fmtl =
-      isl_format_get_layout(image->planes[plane].primary_surface.isl.format);
-
-   /* Disabling CCS for the following case avoids failures in:
-    *    - dEQP-VK.drm_format_modifiers.export_import.*
-    *    - dEQP-VK.synchronization*
-    */
-   if (usage & (VK_IMAGE_USAGE_TRANSFER_DST_BIT |
-                VK_IMAGE_USAGE_TRANSFER_SRC_BIT) && fmtl->bpb <= 16 &&
-       aux_usage == ISL_AUX_USAGE_CCS_E && devinfo->ver >= 12) {
-      aux_supported = false;
-      clear_supported = false;
-   }
-
    if ((usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) && !read_only) {
       /* This image could be used as both an input attachment and a render
        * target (depth, stencil, or color) at the same time and this can cause