Mesa (main): radv: consider radix sort shaders to be internal/meta

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: 8a525c0fa56504f6201178f8cf4d0720692078d3
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a525c0fa56504f6201178f8cf4d0720692078d3

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Wed Apr 27 15:29:34 2022 +0100

radv: consider radix sort shaders to be internal/meta

Cleans up RADV_DEBUG=shaders

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16198>

---

 src/amd/vulkan/radv_meta.c    | 4 ++++
 src/amd/vulkan/radv_private.h | 3 +++
 src/amd/vulkan/radv_shader.c  | 5 ++++-
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c
index 4e4c6e62936..9ce6619a0b6 100644
--- a/src/amd/vulkan/radv_meta.c
+++ b/src/amd/vulkan/radv_meta.c
@@ -537,6 +537,8 @@ radv_device_init_meta(struct radv_device *device)
 
    mtx_init(&device->meta_state.mtx, mtx_plain);
 
+   device->app_shaders_internal = true;
+
    result = radv_device_init_meta_clear_state(device, on_demand);
    if (result != VK_SUCCESS)
       goto fail_clear;
@@ -597,6 +599,8 @@ radv_device_init_meta(struct radv_device *device)
    if (result != VK_SUCCESS)
       goto fail_etc_decode;
 
+   device->app_shaders_internal = false;
+
    return VK_SUCCESS;
 
 fail_etc_decode:
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index fb96feb4092..5133067f5c7 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -884,6 +884,9 @@ struct radv_device {
 
    /* Whether per-vertex VRS is forced. */
    bool force_vrs_enabled;
+
+   /* Whether shaders created through application entrypoints are considered internal. */
+   bool app_shaders_internal;
 };
 
 struct radv_device_memory {
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 60ef16c037f..ab97a48bfaf 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -579,7 +579,9 @@ radv_shader_compile_to_nir(struct radv_device *device, const struct radv_pipelin
       uint32_t *spirv = (uint32_t *)stage->spirv.data;
       assert(stage->spirv.size % 4 == 0);
 
-      if (device->instance->debug_flags & RADV_DEBUG_DUMP_SPIRV)
+      bool dump_meta = device->instance->debug_flags & RADV_DEBUG_DUMP_META_SHADERS;
+      if ((device->instance->debug_flags & RADV_DEBUG_DUMP_SPIRV) &&
+          (!device->app_shaders_internal || dump_meta))
          radv_print_spirv(stage->spirv.data, stage->spirv.size, stderr);
 
       uint32_t num_spec_entries = 0;
@@ -669,6 +671,7 @@ radv_shader_compile_to_nir(struct radv_device *device, const struct radv_pipelin
       nir = spirv_to_nir(spirv, stage->spirv.size / 4, spec_entries, num_spec_entries, stage->stage,
                          stage->entrypoint, &spirv_options,
                          &device->physical_device->nir_options[stage->stage]);
+      nir->info.internal |= device->app_shaders_internal;
       assert(nir->info.stage == stage->stage);
       nir_validate_shader(nir, "after spirv_to_nir");