Mesa (main): pan/va: Improve texture instructions
GitLab Mirror
gitlab-mirror at kemper.freedesktop.org
Mon May 2 15:33:06 UTC 2022
Module: Mesa
Branch: main
Commit: 0b17ea7536c42b1f72b1f99c6f132a0f181eb2d3
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b17ea7536c42b1f72b1f99c6f132a0f181eb2d3
Author: Icecream95 <ixn at disroot.org>
Date: Sat Mar 26 10:37:56 2022 +1300
pan/va: Improve texture instructions
[Alyssa: Related improvements.]
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15588>
---
src/panfrost/bifrost/valhall/ISA.xml | 95 +++++++++++++++++++++++++++++--
src/panfrost/bifrost/valhall/valhall.c.py | 6 +-
src/panfrost/bifrost/valhall/valhall.py | 2 +
3 files changed, 96 insertions(+), 7 deletions(-)
diff --git a/src/panfrost/bifrost/valhall/ISA.xml b/src/panfrost/bifrost/valhall/ISA.xml
index 6db3cf7ee77..f41fcf8883c 100644
--- a/src/panfrost/bifrost/valhall/ISA.xml
+++ b/src/panfrost/bifrost/valhall/ISA.xml
@@ -586,6 +586,17 @@
<value>32</value>
</enum>
+ <enum name="Varying texture register width">
+ <desc>
+ Size of results for varying texture instructions. For dual 16-bit results
+ use "16-bit".
+ </desc>
+ <value desc="16-bit">16</value>
+ <value desc="32-bit">32</value>
+ <value desc="16-bit, 32-bit">16.32</value>
+ <value desc="32-bit, 32-bit">32.32</value>
+ </enum>
+
<enum name="Vector size">
<desc>Number of channels loaded/stored for general memory access.</desc>
<value default="true" desc="Scalar">none</value>
@@ -706,6 +717,21 @@
<value desc="Clobber saved position">clobber</value>
</enum>
+ <enum name="Sample and update mode">
+ <desc>
+ For fused varying/texture instructions, only the following specific
+ combinations of sample and update modes are permitted.
+ </desc>
+ <value desc="Center, store">center_store</value>
+ <value desc="Centroid, store">centroid_store</value>
+ <value desc="Sample, store">sample_store</value>
+ <value desc="Explicit, store">explicit_store</value>
+ <value desc="Center, clobber">center_clobber</value>
+ <reserved/>
+ <value desc="Sample, clobber">sample_clobber</value>
+ <value desc="Retrieve previous state">retrieve</value>
+ </enum>
+
<enum name="Source format">
<desc>
In-memory format of varyings.
@@ -2401,6 +2427,7 @@
<texel_offset/>
<integer_coordinates/>
<fetch_component/>
+ <shadow/>
<!-- Leave secondary_register_width as 0 -->
<sr_count/>
@@ -2423,6 +2450,8 @@
<wide_indices/>
<array_enable/>
<texel_offset/>
+ <shadow/>
+ <lod_mode/>
<sr_count/>
<sr_write_count/>
@@ -2432,17 +2461,71 @@
<src>Image to read from</src>
</ins>
- <ins name="TODO.VAR_TEX" title="Fused varying-texturing" opcode="0x130" unit="VT">
+ <ins name="VAR_TEX_BUF_SINGLE" title="Fused varying-texturing" opcode="0x130" unit="VT">
<desc>
Only works for FP32 varyings. Performance characteristics are similar
- to LD_VAR_IMM_F32.v2.f32 followed by TEX, using both V and T units.
+ to LD_VAR_BUF_IMM_F32.v2.f32 followed by TEX, using both V and T units.
</desc>
- <sr write="true" count="4"/>
- <mod name="dimension" start="28" size="2"/>
- <mod name="skip" start="39" size="1"/>
<slot/>
+ <skip/>
+ <sample_and_update/>
+ <register_type/>
+ <vartex_register_width/>
+ <dimension/>
+ <array_enable/>
+ <shadow/>
+ <lod_mode/>
+
<sr_write_count/>
- <src>Image to read from</src>
+
+ <sr write="true"/>
+ <src size="64">Image to read from</src>
+ <src>Varying offset</src>
+ </ins>
+
+ <ins name="VAR_TEX_BUF_GATHER" title="Fused varying-texturing" opcode="0x131" unit="VT">
+ <desc>
+ Only works for FP32 varyings. Performance characteristics are similar
+ to LD_VAR_BUF_IMM_F32.v2.f32 followed by TEX, using both V and T units.
+ </desc>
+ <slot/>
+ <skip/>
+ <sample_and_update/>
+ <register_type/>
+ <vartex_register_width/>
+ <dimension/>
+ <array_enable/>
+ <integer_coordinates/>
+ <fetch_component/>
+ <shadow/>
+
+ <sr_write_count/>
+
+ <sr write="true"/>
+ <src size="64">Image to read from</src>
+ <src>Varying offset</src>
+ </ins>
+
+ <ins name="VAR_TEX_BUF_DUAL" title="Fused varying-texturing" opcode="0x137" unit="VT">
+ <desc>
+ Only works for FP32 varyings. Performance characteristics are similar
+ to LD_VAR_BUF_IMM_F32.v2.f32 followed by TEX_DUAL, using both V and T units.
+ </desc>
+ <slot/>
+ <skip/>
+ <sample_and_update/>
+ <register_type/>
+ <vartex_register_width/>
+ <dimension/>
+ <array_enable/>
+ <shadow/>
+ <lod_mode/>
+
+ <sr_write_count/>
+
+ <sr write="true"/>
+ <src size="64">Image to read from</src>
+ <src>Varying offset</src>
</ins>
<ins name="FMA_RSCALE.f32" title="Fused floating-point multiply add with exponent bias" dests="1" opcode="0x160" unit="FMA">
diff --git a/src/panfrost/bifrost/valhall/valhall.c.py b/src/panfrost/bifrost/valhall/valhall.c.py
index 38b26707b65..78e397ebdd9 100644
--- a/src/panfrost/bifrost/valhall/valhall.c.py
+++ b/src/panfrost/bifrost/valhall/valhall.c.py
@@ -65,6 +65,11 @@ SKIP = set([
"CLPER.v2u16",
"CLPER.v4u8",
+ # VAR_TEX
+ "VAR_TEX_BUF_SINGLE",
+ "VAR_TEX_BUF_GATHER",
+ "VAR_TEX_BUF_DUAL",
+
# Special cased
"FMA_RSCALE_N.f32",
"FMA_RSCALE_LEFT.f32",
@@ -80,7 +85,6 @@ SKIP = set([
"FATAN_ASSIST.f32",
"SEG_ADD.u64",
"TEX_DUAL",
- "TODO.VAR_TEX",
])
template = """
diff --git a/src/panfrost/bifrost/valhall/valhall.py b/src/panfrost/bifrost/valhall/valhall.py
index de20fbb5c0d..e4b51c6a148 100644
--- a/src/panfrost/bifrost/valhall/valhall.py
+++ b/src/panfrost/bifrost/valhall/valhall.py
@@ -386,6 +386,7 @@ MODIFIERS = {
"skip": Flag("skip", 39),
"register_width": Modifier("register_width", 46, 1, force_enum = "register_width"),
"secondary_register_width": Modifier("secondary_register_width", 47, 1, force_enum = "register_width"),
+ "vartex_register_width": Modifier("varying_texture_register_width", 24, 2),
"atom_opc": Modifier("atomic_operation", 22, 4),
"atom_opc_1": Modifier("atomic_operation_with_1", 22, 4),
@@ -405,6 +406,7 @@ MODIFIERS = {
"cmp": Modifier("condition", 32, 3),
"clamp": Modifier("clamp", 32, 2),
"sr_count": Modifier("staging_register_count", 33, 3, implied = True),
+ "sample_and_update": Modifier("sample_and_update_mode", 33, 3),
"sr_write_count": Modifier("staging_register_write_count", 36, 3, implied = True),
"conservative": Flag("conservative", 35),
More information about the mesa-commit
mailing list