Mesa (main): radv: Use nir_fold_16bit_image_load_store_conversions.

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: 9bca149353181327c18b372d2ba59563f758c411
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bca149353181327c18b372d2ba59563f758c411

Author: Georg Lehmann <dadschoorse at gmail.com>
Date:   Fri Feb 25 18:55:42 2022 +0100

radv: Use nir_fold_16bit_image_load_store_conversions.

Totals from 10 (0.01% of 134913) affected shaders:
CodeSize: 53316 -> 53168 (-0.28%)
Instrs: 9219 -> 9117 (-1.11%)
Latency: 41744 -> 41595 (-0.36%)
InvThroughput: 16616 -> 16412 (-1.23%)

Signed-off-by: Georg Lehmann <dadschoorse at gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15179>

---

 src/amd/vulkan/radv_pipeline.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 1b84ccbb77d..728cd8df753 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -4514,6 +4514,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
             /* Skip if there are potentially conflicting rounding modes */
             if (!nir_has_any_rounding_mode_enabled(stages[i].nir->info.float_controls_execution_mode))
                NIR_PASS_V(stages[i].nir, nir_fold_16bit_sampler_conversions, 0, sampler_dims);
+            NIR_PASS_V(stages[i].nir, nir_fold_16bit_image_load_store_conversions);
 
             NIR_PASS_V(stages[i].nir, nir_opt_vectorize, opt_vectorize_callback, NULL);
           }