Mesa (main): radv: Only emit what is appropriate to the queue family for preambles.

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Module: Mesa
Branch: main
Commit: 380ae300eb8f6b4173724dbe96a9034d33fc316a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=380ae300eb8f6b4173724dbe96a9034d33fc316a

Author: Timur Kristóf <timur.kristof at gmail.com>
Date:   Thu May  5 20:50:11 2022 +0200

radv: Only emit what is appropriate to the queue family for preambles.

This makes the function easier to read and follow.
Also prepares for some future changes when we'll want to
submit to multiple queues at once.

Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Dave Airlie <airlied at redhat.com>
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki at gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16358>

---

 src/amd/vulkan/radv_device.c | 35 +++++++++++++++++++----------------
 1 file changed, 19 insertions(+), 16 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 02691d05358..cfbd49320fe 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -4151,30 +4151,33 @@ radv_update_preamble_cs(struct radv_queue *queue, uint32_t scratch_size_per_wave
       switch (queue->qf) {
       case RADV_QUEUE_GENERAL:
          radv_init_graphics_state(cs, queue);
+
+         if (esgs_ring_bo || gsvs_ring_bo || tess_rings_bo) {
+            radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
+            radeon_emit(cs, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4));
+
+            radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
+            radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0));
+         }
+
+         radv_emit_gs_ring_sizes(queue, cs, esgs_ring_bo, esgs_ring_size, gsvs_ring_bo,
+                                 gsvs_ring_size);
+         radv_emit_tess_factor_ring(queue, cs, tess_rings_bo);
+         radv_emit_global_shader_pointers(queue, cs, descriptor_bo);
+         radv_emit_compute_scratch(queue, cs, compute_scratch_size_per_wave, compute_scratch_waves,
+                                   compute_scratch_bo);
+         radv_emit_graphics_scratch(queue, cs, scratch_size_per_wave, scratch_waves, scratch_bo);
          break;
       case RADV_QUEUE_COMPUTE:
          radv_init_compute_state(cs, queue);
+         radv_emit_global_shader_pointers(queue, cs, descriptor_bo);
+         radv_emit_compute_scratch(queue, cs, compute_scratch_size_per_wave, compute_scratch_waves,
+                                   compute_scratch_bo);
          break;
       default:
          break;
       }
 
-      if (esgs_ring_bo || gsvs_ring_bo || tess_rings_bo) {
-         radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
-         radeon_emit(cs, EVENT_TYPE(V_028A90_VS_PARTIAL_FLUSH) | EVENT_INDEX(4));
-
-         radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
-         radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0));
-      }
-
-      radv_emit_gs_ring_sizes(queue, cs, esgs_ring_bo, esgs_ring_size, gsvs_ring_bo,
-                              gsvs_ring_size);
-      radv_emit_tess_factor_ring(queue, cs, tess_rings_bo);
-      radv_emit_global_shader_pointers(queue, cs, descriptor_bo);
-      radv_emit_compute_scratch(queue, cs, compute_scratch_size_per_wave, compute_scratch_waves,
-                                compute_scratch_bo);
-      radv_emit_graphics_scratch(queue, cs, scratch_size_per_wave, scratch_waves, scratch_bo);
-
       if (gds_bo)
          radv_cs_add_buffer(queue->device->ws, cs, gds_bo);
       if (gds_oa_bo)