Mesa (main): radv: Implement task shader intrinsics in the ABI.

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Module: Mesa
Branch: main
Commit: a8bdcf3c92b12bb551e11bebaf23fa7802f01075
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8bdcf3c92b12bb551e11bebaf23fa7802f01075

Author: Timur Kristóf <timur.kristof at gmail.com>
Date:   Wed May 11 12:38:02 2022 +0200

radv: Implement task shader intrinsics in the ABI.

Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14929>

---

 src/amd/vulkan/radv_nir_lower_abi.c | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_nir_lower_abi.c b/src/amd/vulkan/radv_nir_lower_abi.c
index 60c5fe5fc5b..fd32c353514 100644
--- a/src/amd/vulkan/radv_nir_lower_abi.c
+++ b/src/amd/vulkan/radv_nir_lower_abi.c
@@ -161,6 +161,21 @@ lower_abi_instr(nir_builder *b, nir_instr *instr, void *state)
    case nir_intrinsic_load_viewport_y_offset:
       return ac_nir_load_arg(b, &s->args->ac, s->args->ngg_viewport_translate[1]);
 
+   case nir_intrinsic_load_ring_task_draw_amd:
+      return load_ring(b, RING_TS_DRAW, s);
+
+   case nir_intrinsic_load_ring_task_payload_amd:
+      return load_ring(b, RING_TS_PAYLOAD, s);
+
+   case nir_intrinsic_load_task_ring_entry_amd:
+      return ac_nir_load_arg(b, &s->args->ac, s->args->ac.task_ring_entry);
+
+   case nir_intrinsic_load_task_ib_addr:
+      return ac_nir_load_arg(b, &s->args->ac, s->args->task_ib_addr);
+
+   case nir_intrinsic_load_task_ib_stride:
+      return ac_nir_load_arg(b, &s->args->ac, s->args->task_ib_stride);
+
    default:
       unreachable("invalid NIR RADV ABI intrinsic.");
    }
@@ -197,7 +212,12 @@ filter_abi_instr(const nir_instr *instr,
           intrin->intrinsic == nir_intrinsic_load_viewport_x_scale ||
           intrin->intrinsic == nir_intrinsic_load_viewport_x_offset ||
           intrin->intrinsic == nir_intrinsic_load_viewport_y_scale ||
-          intrin->intrinsic == nir_intrinsic_load_viewport_y_offset;
+          intrin->intrinsic == nir_intrinsic_load_viewport_y_offset ||
+          intrin->intrinsic == nir_intrinsic_load_ring_task_draw_amd ||
+          intrin->intrinsic == nir_intrinsic_load_ring_task_payload_amd ||
+          intrin->intrinsic == nir_intrinsic_load_task_ring_entry_amd ||
+          intrin->intrinsic == nir_intrinsic_load_task_ib_addr ||
+          intrin->intrinsic == nir_intrinsic_load_task_ib_stride;
 }
 
 void