Mesa (main): aco: update waitcnt on GFX11
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Thu May 12 16:08:17 UTC 2022
Module: Mesa
Branch: main
Commit: 7647097d3d420c0c2d004c8068354fd2efc1d833
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7647097d3d420c0c2d004c8068354fd2efc1d833
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Fri May 6 11:38:43 2022 +0200
aco: update waitcnt on GFX11
Not sure if the vmcnt field can use more than 0x3f bits.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16369>
---
src/amd/compiler/aco_ir.cpp | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/amd/compiler/aco_ir.cpp b/src/amd/compiler/aco_ir.cpp
index 6527dd8b588..2bc5b4e447a 100644
--- a/src/amd/compiler/aco_ir.cpp
+++ b/src/amd/compiler/aco_ir.cpp
@@ -779,6 +779,11 @@ wait_imm::pack(enum chip_class chip) const
uint16_t imm = 0;
assert(exp == unset_counter || exp <= 0x7);
switch (chip) {
+ case GFX11:
+ assert(lgkm == unset_counter || lgkm <= 0x3f);
+ assert(vm == unset_counter || vm <= 0x3f);
+ imm = ((vm & 0x3f) << 10) | ((lgkm & 0x3f) << 4) | (exp & 0x7);
+ break;
case GFX10:
case GFX10_3:
assert(lgkm == unset_counter || lgkm <= 0x3f);
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