Mesa (staging/22.1): 22 new commits
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Fri May 13 18:08:47 UTC 2022
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=28264dd5c977d3e2b47a65b893bba8f26c672d20
Author: Victor Hermann Chiletto <v at hnn.net.br>
Date: Fri May 13 02:53:18 2022 -0300
radv: always check entry count in descriptor pool when allocating
Previously this check was skipped for pools with
VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT unset, but after
96a240e1 we need to check this otherwise we risk overflowing
radv_descriptor_pool::entries into the host memory base
This fixes a crash to desktop when launching Dota 2, which overallocates
descriptor sets and expects an error to allocate another descriptor pool
Fixes: 96a240e1767 ("radv: fix memory leak of descriptor set layout")
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16490>
(cherry picked from commit 580046e49faa88bb6d9c183f491f2779de1769f3)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2cca7dce1ee15b4440e4050c2a3ece876fcca9dc
Author: Marcin Ślusarz <marcin.slusarz at intel.com>
Date: Wed Apr 27 16:05:44 2022 +0200
anv: disable streamout before emitting mesh shading state
Fixes tests which use secondary command buffers.
Fixes: ef04caea9b8 ("anv: Implement Mesh Shading pipeline")
Reviewed-by: Caio Oliveira <caio.oliveira at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16493>
(cherry picked from commit aa1c128b54b31580367d97107660c11cb94e0b98)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7ef4f99da045aaad958efe5eac70e7ec397881b
Author: Marcin Ślusarz <marcin.slusarz at intel.com>
Date: Thu Apr 21 17:26:52 2022 +0200
anv: update task/mesh distribution with the recommended values
Fixes: ef04caea9b8 ("anv: Implement Mesh Shading pipeline")
Acked-by: Caio Oliveira <caio.oliveira at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16493>
(cherry picked from commit f083df87108231005889b7af92f0cad7c61e1f81)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa9b7d349cf560700b2fb6ab15cfaca4446539dc
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Thu May 12 17:14:57 2022 -0400
zink: remove implicit query resets
this existed in order to reset query pools in advance so they
would never overflow. now the pools are reset every time the query
is started, so this behavior is no longer necessary
fixes #6475
Fixes: 57dd05616fa ("zink/query: rewrite the query handling code to pass validation.")
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16484>
(cherry picked from commit 1c62c6bafd67d4b375464521a155a12addf9e01b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a21fe415350cdf5617966bed25cf1bba57e69158
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon May 2 15:03:47 2022 -0700
anv: Fix INTEL_DEBUG=bat on XeHP
We no longer emit STATE_BASE_ADDRESS in every batch on XeHP, so the
decoder might not know what the various base addresses are if it's only
looking at a single batch. Fortunately, they also never change, so we
can just emit them once here.
On earlier platforms, initializing them here should be harmless. We'll
emit STATE_BASE_ADDRESS if we change them, which will update these.
Thanks to Iván Briano for catching this.
Fixes: 8831cb38aa9 ("anv: Stop updating STATE_BASE_ADDRESS on XeHP")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16287>
(cherry picked from commit ad537edc7c6826be1e69c1a7b8ec6c5754116e96)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cdc27459bf42e3fdd45876ad0287e09ab8cde47a
Author: Danylo Piliaiev <dpiliaiev at igalia.com>
Date: Thu May 12 15:47:58 2022 +0300
tu: Fix indices of drm_msm_gem_submit_cmd when filling them
For some reason CTS doesn't trigger the issue...
When submit entry is not filled - kernel says:
[drm:msm_ioctl_gem_submit] *ERROR* invalid type: 00000000
Fixes: dbae9fa7d8412252c96e53ef3d50f4349969928a
("tu: implement sysmem vs gmem autotuner")
Signed-off-by: Danylo Piliaiev <dpiliaiev at igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16474>
(cherry picked from commit 9a11ad7efd56d28e1c83aaec5cecb7fa7720fc90)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=87c98bed29f97d8f74239d2a7578981c81ce01fd
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Wed May 11 14:49:12 2022 +0200
radv: disable DCC for Senra Kagura Shinovi Versus
To workaround an issue with feedback loops in D3D9 with DCC in GENERAL,
until we can fix it properly with a new extension.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6469
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Martin Roukala <martin.roukala at mupuf.org>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16452>
(cherry picked from commit b5b2bcab543c62491d35fc838834625a136fea4c)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9c84a3436135d6fd19dd037745d7037c3fb85d55
Author: Jordan Justen <jordan.l.justen at intel.com>
Date: Sat Apr 30 02:01:52 2022 -0700
intel/dev: Enable first set of DG2 PCI IDs
Mostly Matt Roper's kernel patch commit message:
The IDs added here are the subset reserved for 'motherboard down'
designs of DG2. We have all the necessary support upstream to enable
these now.
The remaining DG2 IDs for add-in cards will be enabled in a future
patch once some additional required functionality has fully landed.
Ref: https://patchwork.freedesktop.org/patch/msgid/20220425211251.77154-3-matthew.d.roper@intel.com
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
(cherry picked from commit ad565f6b70d9c4f2af34fe531d01ecf0eaa08500)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb91ddce0b3692cbc2fcab6c6f25e4d54e289b04
Author: Jordan Justen <jordan.l.justen at intel.com>
Date: Sat Apr 30 01:48:40 2022 -0700
intel/dev: Add DG2 G12 PCI IDs
Ref: https://patchwork.freedesktop.org/patch/483381/?series=103098&rev=1
Ref: https://patchwork.freedesktop.org/patch/msgid/20220425211251.77154-3-matthew.d.roper@intel.com
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
(cherry picked from commit 99354efe314a98906fd0ce0dc823dabbf66cd948)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=24626dca6b2f58afcc866d3e8bccd0e4bfcfd3f3
Author: Jordan Justen <jordan.l.justen at intel.com>
Date: Mon Nov 8 14:18:49 2021 -0800
intel/dev: Add INTEL_PLATFORM_DG2_G12
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16449>
(cherry picked from commit 4456209ce54f174bbdb957f0c4c7ca20c94294d8)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=96eb5bbbb7345b80912278bac2faf17fd9c4767a
Author: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Date: Wed May 11 14:57:13 2022 +0200
amd: fix ac_build_mbcnt_add in wave32 mode
add_src was ignored and i32_0 was always used.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Fixes: 1e49018cedf ("amd: Add extra source to the mbcnt_amd NIR intrinsic.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16427>
(cherry picked from commit db2fd0ca83f4f2000eae87f4e7915d775833393a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=caf526716beeed7229a77212e6e4430d572d6d8d
Author: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Date: Mon May 9 22:20:12 2022 +0200
radeonsi: don't use wave32 for GE on gfx10 if culling is used
This is a workaround for issue #6457: it fixes the rendering and
prevent the hang but I can't explain why.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6457
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16427>
(cherry picked from commit 1f3156460781d4ebd9dfb2ff6b9f176259cc5959)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9546233703a0181151d7815c8ee4192160483d39
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Wed May 11 16:59:31 2022 -0400
zink: fix sparse texture depth calcs for arrayed textures
use the array, not the depth
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
(cherry picked from commit 1126f42781d87162eb827794b7446b3619e067af)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b03a2c10e4f2204955b87b975df35273c3689107
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Wed May 11 10:05:03 2022 -0400
zink: set sparse flag in cubemap lowering
Fixes: 2d745904ca7 ("zink: add a gently mangled version of the d3d12 cubemap -> array compiler pass")
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
(cherry picked from commit 56979182dd81c30765d0d1566ef281ac028cc500)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c85d45c884592255ce27971693e3a4e00b7c0b51
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Wed May 11 16:03:16 2022 -0400
zink: fix sparse binding for arrayed textures
this needs to set the arrayLayer, not the z offset
big thanks to Piers Daniell for catching this
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
(cherry picked from commit 377f5e7af958101160907f125a0349df8cec934a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=41967c9107429af69a532f13c106a9fb7a12d674
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Wed May 11 16:02:51 2022 -0400
zink: clamp out min_lod operands for explicit lod ops
this is illegal (and nonsensical)
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
(cherry picked from commit 63dc39ac9047fce206ac11b6e556b6e9a0f8a07b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2649b2c6313c476ab700430592bb839a1b321266
Author: Mike Blumenkrantz <michael.blumenkrantz at gmail.com>
Date: Wed May 11 09:26:22 2022 -0400
zink: fix up sparse texture sampling for shadow samplers
the problem here is that this returns a vec2 instead of a vec5, which
throws all the existing calculations off
given that the shader is (still) expecting a vec2 return from this,
and there's no way to sanely rewrite with nir to be valid for both
sampler types as well as spirv translation, just pad out to a vec2
here and be done with it
Fixes: 73ef54e3424 ("zink: handle residency return value from sparse texture instructions")
Reviewed-by: Dave Airlie <airlied at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16456>
(cherry picked from commit 88912b31119a14ffc99087781a17eeb4af202866)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b28c52e441cf5ff5120d8c982777238d1fcb4b5
Author: Danylo Piliaiev <dpiliaiev at igalia.com>
Date: Mon May 9 20:28:28 2022 +0300
pps: Open writable renderer node in DrmDevice::create
DrmDevice::create_all correctly opened the node with O_RDWR, while
DrmDevice::create was not, causing failure to create writable buffer.
Fixes pps-config on Freedreno.
Fixes: 1cc72b2aef82373247466c2e7b81970c867ad0fa
("pps: Gfx-pps v0.3.0")
Signed-off-by: Danylo Piliaiev <dpiliaiev at igalia.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano at collabora.com>
Reviewed-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16406>
(cherry picked from commit 6bf4ae002aa252824ee3c80e485b16ae1ffd73a4)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a560a87b40b74d5e7be0fdf8c8627420b1ced76
Author: Danylo Piliaiev <dpiliaiev at igalia.com>
Date: Thu May 5 20:29:05 2022 +0300
tu: Do not flush ccu in clear/blits during renderpass
For clear/blits ccu flush not only worse for perf, but also messes up
flush_bits when executed in a conditional set of commands.
We already don't flush for 3d blits.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6419
Fixes: 487aa807bd1b70602fcb6fbdabd101d4cff7c07b
("tu: Rewrite flushing to use barriers")
Signed-off-by: Danylo Piliaiev <dpiliaiev at igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16352>
(cherry picked from commit 187d3df52c77b92bb8002f90818b0a9fce8a7e1a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=60fa35a4dfe981e0e86414c6adb7acf35003e805
Author: Dylan Baker <dylan.c.baker at intel.com>
Date: Fri May 13 10:05:20 2022 -0700
.pick_status.json: Mark 5a3aee78cbb70918b413cdd40dffcae7c9e97d8c as denominated
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b2cc7c5b432fce3d59971a7ca52aa92fe91ff115
Author: Dylan Baker <dylan.c.baker at intel.com>
Date: Fri May 13 10:05:18 2022 -0700
.pick_status.json: Update to 57293dee2b11ba7e52052edc4d0437f08db19144
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6fade22da95b28a98ac0c468a07157192b325a18
Author: Dylan Baker <dylan.c.baker at intel.com>
Date: Tue May 10 22:03:46 2022 -0700
VERSION: bump for 22.1.0-rc5
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