Mesa (main): radv: rename shader compile functions to spirv_to_nir/nir_to_asm
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gitlab-mirror at kemper.freedesktop.org
Wed May 18 07:35:32 UTC 2022
Module: Mesa
Branch: main
Commit: 9207d791af8933ed66de47341bbea172ae3fe75b
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9207d791af8933ed66de47341bbea172ae3fe75b
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Wed Apr 13 09:55:45 2022 +0200
radv: rename shader compile functions to spirv_to_nir/nir_to_asm
For better clarity.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16553>
---
src/amd/vulkan/radv_pipeline.c | 10 +++++-----
src/amd/vulkan/radv_pipeline_rt.c | 2 +-
src/amd/vulkan/radv_shader.c | 12 ++++++------
src/amd/vulkan/radv_shader.h | 8 ++++----
4 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 1d400ff07ae..ddd653c8c21 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -4376,7 +4376,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
int64_t stage_start = os_time_get_nano();
- stages[s].nir = radv_shader_compile_to_nir(device, &stages[s], pipeline_key);
+ stages[s].nir = radv_shader_spirv_to_nir(device, &stages[s], pipeline_key);
stages[s].feedback.duration += os_time_get_nano() - stage_start;
}
@@ -4648,7 +4648,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
if (!pipeline->shaders[MESA_SHADER_FRAGMENT]) {
int64_t stage_start = os_time_get_nano();
- pipeline->shaders[MESA_SHADER_FRAGMENT] = radv_shader_compile(
+ pipeline->shaders[MESA_SHADER_FRAGMENT] = radv_shader_nir_to_asm(
device, &stages[MESA_SHADER_FRAGMENT], &stages[MESA_SHADER_FRAGMENT].nir, 1,
pipeline_key, keep_executable_info, keep_statistic_info, &binaries[MESA_SHADER_FRAGMENT]);
@@ -4663,7 +4663,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
struct nir_shader *combined_nir[] = {stages[MESA_SHADER_VERTEX].nir, stages[MESA_SHADER_TESS_CTRL].nir};
int64_t stage_start = os_time_get_nano();
- pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_compile(
+ pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_nir_to_asm(
device, &stages[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline_key, keep_executable_info,
keep_statistic_info, &binaries[MESA_SHADER_TESS_CTRL]);
@@ -4682,7 +4682,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
int64_t stage_start = os_time_get_nano();
- pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_compile(
+ pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_nir_to_asm(
device, &stages[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline_key, keep_executable_info,
keep_statistic_info, &binaries[MESA_SHADER_GEOMETRY]);
@@ -4697,7 +4697,7 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout
if (!pipeline->shaders[i]) {
int64_t stage_start = os_time_get_nano();
- pipeline->shaders[i] = radv_shader_compile(
+ pipeline->shaders[i] = radv_shader_nir_to_asm(
device, &stages[i], &stages[i].nir, 1, pipeline_key,
keep_executable_info, keep_statistic_info, &binaries[i]);
diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c
index 048f7b94d0e..7b77c36c217 100644
--- a/src/amd/vulkan/radv_pipeline_rt.c
+++ b/src/amd/vulkan/radv_pipeline_rt.c
@@ -808,7 +808,7 @@ parse_rt_stage(struct radv_device *device, const VkPipelineShaderStageCreateInfo
radv_pipeline_stage_init(sinfo, &rt_stage, vk_to_mesa_shader_stage(sinfo->stage));
- nir_shader *shader = radv_shader_compile_to_nir(device, &rt_stage, &key);
+ nir_shader *shader = radv_shader_spirv_to_nir(device, &rt_stage, &key);
if (shader->info.stage == MESA_SHADER_RAYGEN || shader->info.stage == MESA_SHADER_CLOSEST_HIT ||
shader->info.stage == MESA_SHADER_CALLABLE || shader->info.stage == MESA_SHADER_MISS) {
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index b69c504e845..d2736c1f10a 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -553,8 +553,8 @@ radv_lower_fs_intrinsics(nir_shader *nir, const struct radv_pipeline_stage *fs_s
}
nir_shader *
-radv_shader_compile_to_nir(struct radv_device *device, const struct radv_pipeline_stage *stage,
- const struct radv_pipeline_key *key)
+radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_pipeline_stage *stage,
+ const struct radv_pipeline_key *key)
{
unsigned subgroup_size = 64, ballot_bit_size = 64;
if (key->cs.compute_subgroup_size) {
@@ -2046,10 +2046,10 @@ shader_compile(struct radv_device *device, struct nir_shader *const *shaders, in
}
struct radv_shader *
-radv_shader_compile(struct radv_device *device, struct radv_pipeline_stage *pl_stage,
- struct nir_shader *const *shaders, int shader_count,
- const struct radv_pipeline_key *key, bool keep_shader_info,
- bool keep_statistic_info, struct radv_shader_binary **binary_out)
+radv_shader_nir_to_asm(struct radv_device *device, struct radv_pipeline_stage *pl_stage,
+ struct nir_shader *const *shaders, int shader_count,
+ const struct radv_pipeline_key *key, bool keep_shader_info,
+ bool keep_statistic_info, struct radv_shader_binary **binary_out)
{
gl_shader_stage stage = shaders[shader_count - 1]->info.stage;
struct radv_nir_compiler_options options = {0};
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index f47205eda83..dccc2a2f8c8 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -521,9 +521,9 @@ void radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *devi
struct radv_pipeline_stage;
-nir_shader *radv_shader_compile_to_nir(struct radv_device *device,
- const struct radv_pipeline_stage *stage,
- const struct radv_pipeline_key *key);
+nir_shader *radv_shader_spirv_to_nir(struct radv_device *device,
+ const struct radv_pipeline_stage *stage,
+ const struct radv_pipeline_key *key);
void radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level,
const struct radv_shader_info *info, const struct radv_shader_args *args,
@@ -547,7 +547,7 @@ struct radv_shader *radv_shader_create(struct radv_device *device,
const struct radv_shader_binary *binary,
bool keep_shader_info, bool from_cache,
const struct radv_shader_args *args);
-struct radv_shader *radv_shader_compile(
+struct radv_shader *radv_shader_nir_to_asm(
struct radv_device *device, struct radv_pipeline_stage *stage, struct nir_shader *const *shaders,
int shader_count, const struct radv_pipeline_key *key, bool keep_shader_info, bool keep_statistic_info,
struct radv_shader_binary **binary_out);
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