Mesa (staging/22.1): radeonsi: lower nir_intrinsic_sparse_residency_code_and
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Mon May 23 18:09:44 UTC 2022
Module: Mesa
Branch: staging/22.1
Commit: 97885f53491e4f4f459671ef836a4100beeeda09
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=97885f53491e4f4f459671ef836a4100beeeda09
Author: Qiang Yu <yuq825 at gmail.com>
Date: Wed May 18 11:17:20 2022 +0800
radeonsi: lower nir_intrinsic_sparse_residency_code_and
This is required by lower_tg4_offsets which split one
sparseTextureGatherOffsetsARB call to four sparseTextureGatherOffsetARB
calls and merge their resisident results into one.
Fixes: ee040a6b639 ("radeonsi: enable ARB_sparse_texture2")
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Signed-off-by: Qiang Yu <yuq825 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16599>
(cherry picked from commit cc4d5b16661a156e6b3aa4170f7d8f7919efc270)
---
.pick_status.json | 2 +-
src/gallium/drivers/radeonsi/si_shader_nir.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/.pick_status.json b/.pick_status.json
index ed93b817160..307dbceef9e 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -157,7 +157,7 @@
"description": "radeonsi: lower nir_intrinsic_sparse_residency_code_and",
"nominated": true,
"nomination_type": 1,
- "resolution": 0,
+ "resolution": 1,
"main_sha": null,
"because_sha": "ee040a6b6393c8a4726db070a708233e3b5ed44c"
},
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 130d8682069..f6a5ac01d53 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -192,6 +192,8 @@ lower_intrinsic_instr(nir_builder *b, nir_instr *instr, void *dummy)
case nir_intrinsic_is_sparse_texels_resident:
/* code==0 means sparse texels are resident */
return nir_ieq_imm(b, intrin->src[0].ssa, 0);
+ case nir_intrinsic_sparse_residency_code_and:
+ return nir_ior(b, intrin->src[0].ssa, intrin->src[1].ssa);
default:
return NULL;
}
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