[Mesa-dev] r300 compiler vertex shader loops

[Marek Olšák]

Hi Tom,

we use OUT_CS_REG_SEQ for updating registers which are next to each other.
It saves CS space.

BEGIN_CS(6);
OUT_CS_REG(reg, a1);
OUT_CS_REG(reg + 4, a2);
OUT_CS_REG(reg + 8, a3);
END_CS;

can be rewritten to

BEGIN_CS(4);
OUT_CS_REQ_SEQ(reg, 3); // auto-increment reg on a register write.
OUT_CS(a1);
OUT_CS(a2);
OUT_CS(a3);
END_CS;

And you can replace a few OUT_CS with OUT_CS_TABLE. Your fc_op_addrs is
nicely packed (alternating LW and UW exactly like the registers), so you can
write:

OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, code->num_fc_ops * 2);
OUT_CS_TABLE(code->fc_op_addrs, code->num_fc_ops * 2);
OUT_CS_REG_SEQ(R300_VAP_PVS_FLOW_CNTL_LOOP_INDEX_0, code->num_fc_ops);
OUT_CS_TABLE(code->fc_loop_index, code->num_fc_ops);

Otherwise r300g changes look good to me.

-Marek

On Sat, Aug 7, 2010 at 4:36 AM, Tom Stellard <tstellar at gmail.com> wrote:

> Hi,
>
> The two attached patches enable the hardware loop capabilities for
> vertex shaders.  I haven't tested on an r300 card yet, but glsl-vs-loop
> from piglit passes on my r500 card.  Nested loops don't work yet, I
> think it is an issue with the branch emulation, but I'm not sure.
>
> It would be helpful if someone could review the changes I made
> especially to r300_emit.c, r300_state.c, and both r300_reg.h files to
> make sure I'm doing things the right way.
>
> Thanks.
>
> -Tom
>
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>
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