[Mesa-dev] r300 compiler vertex shader loops
maraeo at gmail.com
Sat Aug 7 06:01:56 PDT 2010
we use OUT_CS_REG_SEQ for updating registers which are next to each other.
It saves CS space.
OUT_CS_REG(reg + 4, a2);
OUT_CS_REG(reg + 8, a3);
can be rewritten to
OUT_CS_REQ_SEQ(reg, 3); // auto-increment reg on a register write.
And you can replace a few OUT_CS with OUT_CS_TABLE. Your fc_op_addrs is
nicely packed (alternating LW and UW exactly like the registers), so you can
OUT_CS_REG_SEQ(R500_VAP_PVS_FLOW_CNTL_ADDRS_LW_0, code->num_fc_ops * 2);
OUT_CS_TABLE(code->fc_op_addrs, code->num_fc_ops * 2);
Otherwise r300g changes look good to me.
On Sat, Aug 7, 2010 at 4:36 AM, Tom Stellard <tstellar at gmail.com> wrote:
> The two attached patches enable the hardware loop capabilities for
> vertex shaders. I haven't tested on an r300 card yet, but glsl-vs-loop
> from piglit passes on my r500 card. Nested loops don't work yet, I
> think it is an issue with the branch emulation, but I'm not sure.
> It would be helpful if someone could review the changes I made
> especially to r300_emit.c, r300_state.c, and both r300_reg.h files to
> make sure I'm doing things the right way.
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
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