[Mesa-dev] i965: merging the two compilation paths for fragment programs?

Segovia, Benjamin benjamin.segovia at intel.com
Mon Jul 26 16:50:00 PDT 2010


Hello all,

i965 has today an issue with fp compilation. There are two passes: one for branch-free programs and one for the others.

For "branch porograms", the code is generated by a _direct_ translation of the mesa gpu program. Even if with some optimizations in prog_optimize.c and the new upcoming compiler, it sounds clearly not enough. In particular, the mrf-to-grf move removes do not work and the better mov analysis (pass0, pass1, pass2 in i965 backend) done on the scalar code is not done at all if you have one branch.

What we need to unify all this is at least a control flow graph (cfg). The question is where to build it. 

glsl2 will have its own representation. Unfortunately, I imagine we can not use it in a short term for the back-ends since it means, breaking everything. 

So, maybe a simple strategy will be to have a cfg for each mesa program, cfg that can be built by the front end or by the back end if the front end did not provide it. Also, glsl2 could provide a cfg builder of its own from its own inner reprensation to the Mesa one (?)

So, what I plan to do right now as a proof of concept is to build a generic cfg (on _Mesa_ code not on Gen code) in the i965 back end and unify the i965 shader compilers using it. Then, if other back ends may use it, it could be fine to move it in the front end.

What do you think about that?

Cheers,
Ben


More information about the mesa-dev mailing list