[Mesa-dev] [PATCH] gallium: add CAPs for indirect addressing and lower it in st/mesa when needed
Brian Paul
brianp at vmware.com
Thu Nov 11 09:26:28 PST 2010
We've had indirect addressing of inputs/outputs for a long time (tgsi
supports it and softpipe/llvmpipe support it).
-Brian
On 11/11/2010 10:16 AM, Marek Olšák wrote:
> BTW I remember that somebody said shader outputs (and inputs?) are not
> indexable in TGSI, but now I added the CAP for it. Should that CAP go
> away or are we gonna allow it?
>
> Marek
>
> On Wed, Nov 10, 2010 at 9:29 PM, Marek Olšák <maraeo at gmail.com
> <mailto:maraeo at gmail.com>> wrote:
>
> Required because ATI and NVIDIA DX9 GPUs do not support indirect
> addressing
> of temps, inputs, outputs, and consts (FS-only) or the hw support is so
> limited that we cannot use it.
>
> This should make r300g and possibly nvfx more feature complete.
>
> Signed-off-by: Marek Olšák <maraeo at gmail.com <mailto:maraeo at gmail.com>>
> ---
> src/gallium/include/pipe/p_defines.h | 5 +++++
> src/mesa/state_tracker/st_extensions.c | 9 +++++++++
> 2 files changed, 14 insertions(+), 0 deletions(-)
>
> diff --git a/src/gallium/include/pipe/p_defines.h
> b/src/gallium/include/pipe/p_defines.h
> index 53f7b60..6cca301 100644
> --- a/src/gallium/include/pipe/p_defines.h
> +++ b/src/gallium/include/pipe/p_defines.h
> @@ -483,7 +483,12 @@ enum pipe_shader_cap
> PIPE_SHADER_CAP_MAX_TEMPS,
> PIPE_SHADER_CAP_MAX_ADDRS,
> PIPE_SHADER_CAP_MAX_PREDS,
> + /* boolean caps */
> PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED,
> + PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR,
> + PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR,
> + PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR,
> + PIPE_SHADER_CAP_INDIRECT_CONST_ADDR,
> };
>
> /**
> diff --git a/src/mesa/state_tracker/st_extensions.c
> b/src/mesa/state_tracker/st_extensions.c
> index 2720f44..1327491 100644
> --- a/src/mesa/state_tracker/st_extensions.c
> +++ b/src/mesa/state_tracker/st_extensions.c
> @@ -175,6 +175,15 @@ void st_init_limits(struct st_context *st)
>
> options->EmitNoCont = !screen->get_shader_param(screen, i,
> PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED);
>
> + options->EmitNoIndirectInput =
> !screen->get_shader_param(screen, i,
> +
> PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR);
> + options->EmitNoIndirectOutput =
> !screen->get_shader_param(screen, i,
> +
> PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR);
> + options->EmitNoIndirectTemp =
> !screen->get_shader_param(screen, i,
> +
> PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR);
> + options->EmitNoIndirectUniform =
> !screen->get_shader_param(screen, i,
> +
> PIPE_SHADER_CAP_INDIRECT_CONST_ADDR);
> +
> if(options->EmitNoLoops)
> options->MaxUnrollIterations =
> MIN2(screen->get_shader_param(screen, i,
> PIPE_SHADER_CAP_MAX_INSTRUCTIONS), 65536);
> }
> --
> 1.7.0.4
>
>
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