[Mesa-dev] [RFC] Mesa 7.9 release criteria

Ian Romanick idr at freedesktop.org
Wed Sep 1 21:55:50 PDT 2010

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Brian Paul wrote:
> Ian, I'm still getting up to speed on the new compiler, but it looks
> like a full 4-element temp/const vector is allocated for each GLSL
> float.  The previous compiler would try to pack four floats into a
> single vector whenever possible.  This could dramatically reduced the
> number of vector temps/consts needed.
> I'm worried that some apps that use large shaders will start failing.

I don't think this will be a significant issue in the short term for a
couple reasons.  We have 4 backends to worry about, and I think they can
call cope with this in various ways.

 - Miscellaneous software backends:  these just don't care about
register limits.  They can spill and just deal with it.

 - Register constrained architectures such as i915 and r300:  these
architectures are more constrained for instructions than registers.  I
expect that they will run out of instructions long before register
limits are encountered.

 - 965: The vertex processor can spill.  The fragment processor is SoA,
so the wasted components don't actually get allocated.

 - Later Radeons and NV chips:  I thought that these each had their own
register allocators than ran after Mesa's.  These should be able to do
the right thing.  Yes?

The more significant issue, and one that I plan to tackle straightaway
for 7.9.1, is packing of uniforms and varyings.  I expect more
applications will encounter difficulties here than with registers.

Do you think that either of these is significant enough to block a 7.9
release?  If so, we need to get some tests that reproduce these issues ASAP.
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