[Mesa-dev] [PATCH] r600g: Use clamped math for RCP and RSQ.

[Tilman Sauerbeck]

This is likely only correct for OpenGL and not other state trackers.

Signed-off-by: Tilman Sauerbeck <tilman at code-monkey.de>
---
 src/gallium/drivers/r600/r600_shader.c |   16 ++++++++++++++--
 1 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 2aeaf9a..190e455 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -1130,7 +1130,13 @@ static int tgsi_rsq(struct r600_shader_ctx *ctx)
 	int i, r;
 
 	memset(&alu, 0, sizeof(struct r600_bc_alu));
-	alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_IEEE);
+
+	/* FIXME:
+	 * For state trackers other than OpenGL, we'll want to use
+	 * _RECIPSQRT_IEEE instead.
+	 */
+	alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIPSQRT_CLAMPED);
+
 	for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
 		r = tgsi_src(ctx, &inst->Src[i], &alu.src[i]);
 		if (r)
@@ -2631,7 +2637,13 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_ARL,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_arl},
 	{TGSI_OPCODE_MOV,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOV, tgsi_op2},
 	{TGSI_OPCODE_LIT,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_lit},
-	{TGSI_OPCODE_RCP,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_IEEE, tgsi_trans_srcx_replicate},
+
+	/* FIXME:
+	 * For state trackers other than OpenGL, we'll want to use
+	 * _RECIP_IEEE instead.
+	 */
+	{TGSI_OPCODE_RCP,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RECIP_CLAMPED, tgsi_trans_srcx_replicate},
+
 	{TGSI_OPCODE_RSQ,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_rsq},
 	{TGSI_OPCODE_EXP,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_exp},
 	{TGSI_OPCODE_LOG,	0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_log},
-- 
1.7.2.3