[Mesa-dev] [PATCH 2/2] i965: Quit spamming gen6 DP read/write send instructions with gen5 bits.

[Zou, Nanhai]

Eric,
	I think for gen6 most of the DP read in the pipeline should go through constant cache instead of other caches. Maybe we should implement an gen6_const_read_message.
	That is better for performance.
Thanks
Zou Nanhai

>>-----Original Message-----
>>From: mesa-dev-bounces+nanhai.zou=intel.com at lists.freedesktop.org
>>[mailto:mesa-dev-bounces+nanhai.zou=intel.com at lists.freedesktop.org] On
>>Behalf Of Eric Anholt
>>Sent: 2011年4月15日 14:53
>>To: mesa-dev at lists.freedesktop.org
>>Subject: [Mesa-dev] [PATCH 2/2] i965: Quit spamming gen6 DP read/write send
>>instructions with gen5 bits.
>>
>>This was copy-and-paste from originally trying to get DP read/write
>>working reliably, and notably for other common messages (URB, sampler)
>>we weren't doing this.
>>---
>> src/mesa/drivers/dri/i965/brw_eu_emit.c |    6 ------
>> 1 files changed, 0 insertions(+), 6 deletions(-)
>>
>>diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
>>b/src/mesa/drivers/dri/i965/brw_eu_emit.c
>>index 2d654e7..71485cd 100644
>>--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
>>+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
>>@@ -499,9 +499,6 @@ static void brw_set_dp_write_message( struct brw_context
>>*brw,
>>
>>        /* We always use the render cache for write messages */
>>        insn->header.destreg__conditionalmod =
>>BRW_MESSAGE_TARGET_DATAPORT_WRITE;
>>-	/* XXX really need below? */
>>-       insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_DATAPORT_WRITE;
>>-       insn->bits2.send_gen5.end_of_thread = end_of_thread;
>>    } else if (intel->gen == 5) {
>>        insn->bits3.dp_write_gen5.binding_table_index =
>>binding_table_index;
>>        insn->bits3.dp_write_gen5.msg_control = msg_control;
>>@@ -558,9 +555,6 @@ brw_set_dp_read_message(struct brw_context *brw,
>>        insn->bits3.dp_render_cache.msg_length = msg_length;
>>        insn->bits3.dp_render_cache.end_of_thread = 0;
>>        insn->header.destreg__conditionalmod = target_function;
>>-	/* XXX really need below? */
>>-       insn->bits2.send_gen5.sfid = target_function;
>>-       insn->bits2.send_gen5.end_of_thread = 0;
>>    } else if (intel->gen == 5) {
>>        insn->bits3.dp_read_gen5.binding_table_index = binding_table_index;
>>        insn->bits3.dp_read_gen5.msg_control = msg_control;
>>--
>>1.7.4.1
>>
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