[Mesa-dev] [PATCH 06/12] intel: Change allocation of user-created renderbuffers for HiZ

[chad at chad-versace.us]

From: Chad Versace <chad.versace at intel.com>

Hardware does not allow rendering to depth/stencil formats when HiZ is
enabled. Also, a GEM region must be allocated for HiZ.

Signed-off-by: Chad Versace <chad.versace at intel.com>
---
 src/mesa/drivers/dri/intel/intel_fbo.c |   36 +++++++++++++++++++++++++++++++-
 1 files changed, 35 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index ad2468a..afa77ca 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -79,6 +79,9 @@ intel_delete_renderbuffer(struct gl_renderbuffer *rb)
    if (intel && irb->region) {
       intel_region_release(&irb->region);
    }
+   if (intel && irb->hiz_region) {
+      intel_region_release(&irb->hiz_region);
+   }
 
    free(irb);
 }
@@ -113,6 +116,11 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
 
    ASSERT(rb->Name != 0);
 
+   /* FINISHME: Support combined depth/stencil renderbuffers with HiZ. */
+   if (intel->use_hiz && (internalFormat == GL_DEPTH_STENCIL_EXT
+                          || internalFormat == GL_DEPTH24_STENCIL8_EXT))
+      assert(!"FINISHME: Support combined depth/stencil renderbuffers with HiZ");
+
    switch (internalFormat) {
    default:
       /* Use the same format-choice logic as for textures.
@@ -122,6 +130,11 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
        */
       rb->Format = intel->ctx.Driver.ChooseTextureFormat(ctx, internalFormat,
 							 GL_NONE, GL_NONE);
+      /*
+       * Hardware does not support combined depth/stencil formats when HiZ
+       * is enabled.
+       */
+      assert(!intel->use_hiz || (rb->Format != MESA_FORMAT_S8_Z24));
       break;
    case GL_STENCIL_INDEX:
    case GL_STENCIL_INDEX1_EXT:
@@ -129,7 +142,10 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
    case GL_STENCIL_INDEX8_EXT:
    case GL_STENCIL_INDEX16_EXT:
       /* These aren't actual texture formats, so force them here. */
-      rb->Format = MESA_FORMAT_S8_Z24;
+      if (intel->use_hiz)
+         rb->Format = MESA_FORMAT_S8;
+      else
+         rb->Format = MESA_FORMAT_S8_Z24;
       break;
    }
 
@@ -143,6 +159,9 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
    if (irb->region) {
       intel_region_release(&irb->region);
    }
+   if (irb->hiz_region) {
+      intel_region_release(&irb->hiz_region);
+   }
 
    /* allocate new memory region/renderbuffer */
 
@@ -167,6 +186,21 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
 
    ASSERT(irb->region->buffer);
 
+   if (rb->Format == MESA_FORMAT_X8_Z24) {
+      assert(intel->use_hiz);
+      irb->hiz_region = intel_region_alloc(intel->intelScreen,
+                                          I915_TILING_Y,
+                                          irb->region->cpp,
+                                          irb->region->width,
+                                          irb->region->height,
+                                          GL_TRUE);
+      if (!irb->hiz_region) {
+         intel_region_release(&irb->region);
+         return GL_FALSE;
+      }
+      ASSERT(irb->hiz_region->buffer);
+   }
+
    rb->Width = width;
    rb->Height = height;
 
-- 
1.7.4.2