[Mesa-dev] [PATCH 2/5] i965: prepare work for dynamic instruction store size on IF/ELSE/ENDIF

[Yuanhan Liu]

If dynamic instruction store size is enabled, while after the brw_IF/ELSE()
and before the brw_ENDIF() function, the eu instruction store base
address(p->store) may change.

Thus let if_stack just store the instruction pointer(an index). This is
somehow more flexible and safe than store the instruction memory address.

Signed-off-by: Yuanhan Liu <yuanhan.liu at linux.intel.com>
---
 src/mesa/drivers/dri/i965/brw_eu.c      |    3 +--
 src/mesa/drivers/dri/i965/brw_eu.h      |    4 +++-
 src/mesa/drivers/dri/i965/brw_eu_emit.c |   16 ++++++++--------
 3 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index b5a858b..77eb2cf 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -191,8 +191,7 @@ brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
    /* Set up control flow stack */
    p->if_stack_depth = 0;
    p->if_stack_array_size = 16;
-   p->if_stack =
-      rzalloc_array(mem_ctx, struct brw_instruction *, p->if_stack_array_size);
+   p->if_stack = rzalloc_array(mem_ctx, int, p->if_stack_array_size);
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index c7eefe3..607ab96 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -123,8 +123,10 @@ struct brw_compile {
    /* Control flow stacks:
     * - if_stack contains IF and ELSE instructions which must be patched
     *   (and popped) once the matching ENDIF instruction is encountered.
+    *
+    *   Just store the instruction pointer(an index).
     */
-   struct brw_instruction **if_stack;
+   int *if_stack;
    int if_stack_depth;
    int if_stack_array_size;
 
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 60350ca..067111c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -896,14 +896,14 @@ struct brw_instruction *brw_JMPI(struct brw_compile *p,
 }
 
 static void
-push_if_stack(struct brw_compile *p, struct brw_instruction *inst)
+push_if_stack(struct brw_compile *p, int inst)
 {
    p->if_stack[p->if_stack_depth] = inst;
 
    p->if_stack_depth++;
    if (p->if_stack_array_size <= p->if_stack_depth) {
       p->if_stack_array_size *= 2;
-      p->if_stack = reralloc(p->mem_ctx, p->if_stack, struct brw_instruction *,
+      p->if_stack = reralloc(p->mem_ctx, p->if_stack, int,
 			     p->if_stack_array_size);
    }
 }
@@ -957,7 +957,7 @@ brw_IF(struct brw_compile *p, GLuint execute_size)
 
    p->current->header.predicate_control = BRW_PREDICATE_NONE;
 
-   push_if_stack(p, insn);
+   push_if_stack(p, brw_insn_index(p, insn));
    return insn;
 }
 
@@ -989,7 +989,7 @@ gen6_IF(struct brw_compile *p, uint32_t conditional,
    if (!p->single_program_flow)
       insn->header.thread_control = BRW_THREAD_SWITCH;
 
-   push_if_stack(p, insn);
+   push_if_stack(p, brw_insn_index(p, insn));
    return insn;
 }
 
@@ -1139,7 +1139,7 @@ brw_ELSE(struct brw_compile *p)
    if (!p->single_program_flow)
       insn->header.thread_control = BRW_THREAD_SWITCH;
 
-   push_if_stack(p, insn);
+   push_if_stack(p, brw_insn_index(p, insn));
 }
 
 void
@@ -1152,11 +1152,11 @@ brw_ENDIF(struct brw_compile *p)
 
    /* Pop the IF and (optional) ELSE instructions from the stack */
    p->if_stack_depth--;
-   if (p->if_stack[p->if_stack_depth]->header.opcode == BRW_OPCODE_ELSE) {
-      else_inst = p->if_stack[p->if_stack_depth];
+   if (p->store[p->if_stack[p->if_stack_depth]].header.opcode == BRW_OPCODE_ELSE) {
+      else_inst = &p->store[p->if_stack[p->if_stack_depth]];
       p->if_stack_depth--;
    }
-   if_inst = p->if_stack[p->if_stack_depth];
+   if_inst = &p->store[p->if_stack[p->if_stack_depth]];
 
    if (p->single_program_flow) {
       /* ENDIF is useless; don't bother emitting it. */
-- 
1.7.4.4