[Mesa-dev] i965 gen6: Pass-through GS program for future use by transform feedback

Paul Berry stereotype441 at gmail.com
Mon Dec 5 09:40:43 PST 2011

This patch series introduces a geometry shader program for i965 Gen6
(Sandy Bridge) that does nothing--it simply passes vertices through to
later stages of the graphics pipeline.  This is a preliminary step
towards implementing transform feedback, since on Gen6, transform
feedback is accomplished by having the geometry shader write vertices
to memory.

Patch 01/10 is a core mesa patch--it introduces a new bit to the
ctx->NewState bitfield to track when changes to the transform feedback
setup have occurred.  This allows the i965 back-end to avoid
unnecessary recomputations when the transform feedback setup is

Patches 02/10-09/10 refactor the i965 driver in preparation for adding
the new geometry shader program.  In particular, they clean up the old
(Gen4-Gen5) geometry shader code so that it can be expanded, and fix
some code generation bugs that had previously been benign.  Note:
patches 06/10 and 07/10 are from Kenneth Graunke's "gs2" branch, which
I used as the starting point for my development.  They ensure that URB
space is allocated for the GS unit so that the geometry shader program
can run.  Down the road, we may want to tweak the URB space allocation
to improve performance, but that seems like it should wait until
transform feedback functionality works.

Patch 10/10 adds the pass-through program itself.  At the moment it is
not used (since transform feedback support isn't enabled by default
yet), however it can be tested by setting the "INTEL_FORCE_GS"
environment variable.

[PATCH 01/10] mesa: Track changes to transform feedback state.
[PATCH 02/10] i965 gs: Reduce information in key to avoid unnecessary recompiles.
[PATCH 03/10] i965 gs: Remove unnecessary mapping of key->primitive.
[PATCH 04/10] i965: Don't convert if/else to conditional adds on Gen6.
[PATCH 05/10] i965: Fix convert_IF_ELSE_to_ADD for gen7.
[PATCH 06/10] i965: Set the maximum number of GS URB entries on Sandybridge.
[PATCH 07/10] i965: Initial stab at GS URB space allocation.
[PATCH 08/10] i965 gs: Clean up dodgy register re-use, at the cost of a few MOVs.
[PATCH 09/10] i965: Clean up misleading defines for DWORD 2 of URB_WRITE header.
[PATCH 10/10] i965 gen6: Implement pass-through GS for transform feedback.

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