[Mesa-dev] [PATCH 1/3] i965: Rename BRW_NEW_WM_SURFACES to BRW_NEW_SURFACES.
Paul Berry
stereotype441 at gmail.com
Thu Dec 22 14:06:44 PST 2011
The surface states tracked by BRW_NEW_WM_SURFACES are no longer used
for just WM. They are also used for vertex texturing and transform
feedback. To avoid confusion, this patch renames BRW_NEW_WM_SURFACES
to BRW_NEW_SURFACES.
---
src/mesa/drivers/dri/i965/brw_context.h | 4 ++--
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 ++++++------
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 15a781b..fb41fd1 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -131,7 +131,7 @@ enum brw_state_id {
BRW_STATE_CONTEXT,
BRW_STATE_WM_INPUT_DIMENSIONS,
BRW_STATE_PSP,
- BRW_STATE_WM_SURFACES,
+ BRW_STATE_SURFACES,
BRW_STATE_VS_BINDING_TABLE,
BRW_STATE_GS_BINDING_TABLE,
BRW_STATE_PS_BINDING_TABLE,
@@ -158,7 +158,7 @@ enum brw_state_id {
#define BRW_NEW_CONTEXT (1 << BRW_STATE_CONTEXT)
#define BRW_NEW_WM_INPUT_DIMENSIONS (1 << BRW_STATE_WM_INPUT_DIMENSIONS)
#define BRW_NEW_PSP (1 << BRW_STATE_PSP)
-#define BRW_NEW_WM_SURFACES (1 << BRW_STATE_WM_SURFACES)
+#define BRW_NEW_SURFACES (1 << BRW_STATE_SURFACES)
#define BRW_NEW_VS_BINDING_TABLE (1 << BRW_STATE_VS_BINDING_TABLE)
#define BRW_NEW_GS_BINDING_TABLE (1 << BRW_STATE_GS_BINDING_TABLE)
#define BRW_NEW_PS_BINDING_TABLE (1 << BRW_STATE_PS_BINDING_TABLE)
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 74d01d8..a8bda5a 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -360,7 +360,7 @@ static struct dirty_bit_map brw_bits[] = {
DEFINE_BIT(BRW_NEW_WM_INPUT_DIMENSIONS),
DEFINE_BIT(BRW_NEW_PROGRAM_CACHE),
DEFINE_BIT(BRW_NEW_PSP),
- DEFINE_BIT(BRW_NEW_WM_SURFACES),
+ DEFINE_BIT(BRW_NEW_SURFACES),
DEFINE_BIT(BRW_NEW_INDICES),
DEFINE_BIT(BRW_NEW_INDEX_BUFFER),
DEFINE_BIT(BRW_NEW_VERTICES),
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 3801c09..e908430 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -828,7 +828,7 @@ brw_upload_wm_pull_constants(struct brw_context *brw)
drm_intel_bo_unreference(brw->wm.const_bo);
brw->wm.const_bo = NULL;
brw->bind.surf_offset[surf_index] = 0;
- brw->state.dirty.brw |= BRW_NEW_WM_SURFACES;
+ brw->state.dirty.brw |= BRW_NEW_SURFACES;
}
return;
}
@@ -850,7 +850,7 @@ brw_upload_wm_pull_constants(struct brw_context *brw)
params->NumParameters,
&brw->bind.surf_offset[surf_index]);
- brw->state.dirty.brw |= BRW_NEW_WM_SURFACES;
+ brw->state.dirty.brw |= BRW_NEW_SURFACES;
}
const struct brw_tracked_state brw_wm_pull_constants = {
@@ -1004,7 +1004,7 @@ brw_update_renderbuffer_surfaces(struct brw_context *brw)
} else {
intel->vtbl.update_null_renderbuffer_surface(brw, 0);
}
- brw->state.dirty.brw |= BRW_NEW_WM_SURFACES;
+ brw->state.dirty.brw |= BRW_NEW_SURFACES;
}
const struct brw_tracked_state brw_renderbuffer_surfaces = {
@@ -1046,7 +1046,7 @@ brw_update_texture_surfaces(struct brw_context *brw)
}
}
- brw->state.dirty.brw |= BRW_NEW_WM_SURFACES;
+ brw->state.dirty.brw |= BRW_NEW_SURFACES;
}
const struct brw_tracked_state brw_texture_surfaces = {
@@ -1075,7 +1075,7 @@ brw_upload_binding_table(struct brw_context *brw)
sizeof(uint32_t) * BRW_MAX_SURFACES,
32, &brw->bind.bo_offset);
- /* BRW_NEW_WM_SURFACES and BRW_NEW_VS_CONSTBUF */
+ /* BRW_NEW_SURFACES and BRW_NEW_VS_CONSTBUF */
for (i = 0; i < BRW_MAX_SURFACES; i++) {
bind[i] = brw->bind.surf_offset[i];
}
@@ -1089,7 +1089,7 @@ const struct brw_tracked_state brw_binding_table = {
.mesa = 0,
.brw = (BRW_NEW_BATCH |
BRW_NEW_VS_CONSTBUF |
- BRW_NEW_WM_SURFACES),
+ BRW_NEW_SURFACES),
.cache = 0
},
.emit = brw_upload_binding_table,
--
1.7.6.4
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