[Mesa-dev] [PATCH 8/8] i965: increase the brw eu instruction store size dynamically

[Eric Anholt]

On Fri, 23 Dec 2011 13:11:58 +0800, Yuanhan Liu <yuanhan.liu at linux.intel.com> wrote:
> On Thu, Dec 22, 2011 at 07:51:46PM -0800, Kenneth Graunke wrote:
> > On 12/22/2011 07:04 PM, Yuanhan Liu wrote:
> > > On Thu, Dec 22, 2011 at 02:33:03PM -0800, Kenneth Graunke wrote:
> > >> On 12/21/2011 01:33 AM, Yuanhan Liu wrote:
> > [snip]
> > >>> -#define BRW_EU_MAX_INSN_STACK 5
> > >>> -#define BRW_EU_MAX_INSN 10000
> > >>> +#define BRW_EU_MAX_INSN_STACK   5
> > >>> +#define BRW_EU_MAX_INSN         (1024 * 1024)
> > >>
> > >> I'm actually surprised to see BRW_EU_MAX_INSN at all.  As far as I know,
> > >> there isn't an actual hardware limit on the number of instructions,
> > > 
> > > Glad to know that. Thanks.
> > > 
> > >> so
> > >> I'm not sure why we should cap it at all.  Especially not to some
> > >> arbitrary number.  (I'm assuming that 1024 * 1024 is just something you
> > >> came up with arbitrarily...)
> > > 
> > > Aha, yes, you are right, I made it. :)
> > > 
> > > Here is the fixed patch, please help to review it:
> > 
> > Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
> > 
> > I'd wait for an ack from Eric before pushing, though.
> 
> It's OK to me. Eric, comments? Or, can I get your reviewed-by for this
> series?

Yeah, the remainder are also

Reviewed-by: Eric Anholt <eric at anholt.net>
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