[Mesa-dev] [PATCH 4/4] nv50: implement resource_resolve with custom blit

Christoph Bumiller e0425955 at student.tuwien.ac.at
Thu Jul 28 06:59:37 PDT 2011


---
 src/gallium/drivers/nv50/nv50_context.h        |    3 +-
 src/gallium/drivers/nv50/nv50_formats.c        |    4 +-
 src/gallium/drivers/nv50/nv50_screen.c         |    4 +
 src/gallium/drivers/nv50/nv50_screen.h         |    6 +
 src/gallium/drivers/nv50/nv50_shader_state.c   |   11 +-
 src/gallium/drivers/nv50/nv50_state_validate.c |    4 +-
 src/gallium/drivers/nv50/nv50_surface.c        |  536 +++++++++++++++++++++++-
 src/gallium/drivers/nv50/nv50_vbo.c            |    2 +-
 8 files changed, 559 insertions(+), 11 deletions(-)

diff --git a/src/gallium/drivers/nv50/nv50_context.h b/src/gallium/drivers/nv50/nv50_context.h
index c1226d5..284db69 100644
--- a/src/gallium/drivers/nv50/nv50_context.h
+++ b/src/gallium/drivers/nv50/nv50_context.h
@@ -171,7 +171,8 @@ void nv50_validate_derived_rs(struct nv50_context *);
 extern void nv50_init_state_functions(struct nv50_context *);
 
 /* nv50_state_validate.c */
-extern boolean nv50_state_validate(struct nv50_context *);
+/* @words: check for space before emitting relocs */
+extern boolean nv50_state_validate(struct nv50_context *, unsigned words);
 
 /* nv50_surface.c */
 extern void nv50_clear(struct pipe_context *, unsigned buffers,
diff --git a/src/gallium/drivers/nv50/nv50_formats.c b/src/gallium/drivers/nv50/nv50_formats.c
index be43147..34502d0 100644
--- a/src/gallium/drivers/nv50/nv50_formats.c
+++ b/src/gallium/drivers/nv50/nv50_formats.c
@@ -116,7 +116,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z24_UNORM_S8_USCALED] = { NV50_ZETA_FORMAT_Z24_S8_UNORM,
-    B_(C0, C0, C0, ONE_FLOAT, UNORM, UINT, UINT, UINT, Z24_S8, 0),
+    B_(C0, C1, C0, ONE_FLOAT, UNORM, UINT, UINT, UINT, Z24_S8, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z24X8_UNORM] = { NV50_ZETA_FORMAT_Z24_X8_UNORM,
@@ -124,7 +124,7 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_S8_USCALED_Z24_UNORM] = { NV50_ZETA_FORMAT_S8_Z24_UNORM,
-    B_(C1, C1, C1, ONE_FLOAT, UINT, UNORM, UINT, UINT, S8_Z24, 0),
+    B_(C1, C0, C1, ONE_FLOAT, UINT, UNORM, UINT, UINT, S8_Z24, 0),
     SAMPLER_VIEW | DEPTH_STENCIL },
 
    [PIPE_FORMAT_Z32_FLOAT] = { NV50_ZETA_FORMAT_Z32_FLOAT,
diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index 4139b85..07a74cc 100644
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -91,6 +91,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_TEXTURE_SHADOW_MAP:
    case PIPE_CAP_NPOT_TEXTURES:
    case PIPE_CAP_ANISOTROPIC_FILTER:
+   case PIPE_CAP_SCALED_RESOLVE:
       return 1;
    case PIPE_CAP_SEAMLESS_CUBE_MAP:
       return nv50_screen(pscreen)->tesla->grclass >= NVA0_3D;
@@ -604,6 +605,9 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 
    screen->mm_VRAM_fe0 = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, 0xfe0);
 
+   if (!nv50_blitctx_create(screen))
+      goto fail;
+
    nouveau_fence_new(&screen->base, &screen->base.fence.current, FALSE);
 
    return pscreen;
diff --git a/src/gallium/drivers/nv50/nv50_screen.h b/src/gallium/drivers/nv50/nv50_screen.h
index 64ad209..315ca80 100644
--- a/src/gallium/drivers/nv50/nv50_screen.h
+++ b/src/gallium/drivers/nv50/nv50_screen.h
@@ -21,6 +21,8 @@ struct nv50_context;
 
 #define NV50_SCREEN_RESIDENT_BO_COUNT 5
 
+struct nv50_blitctx;
+
 struct nv50_screen {
    struct nouveau_screen base;
    struct nouveau_winsys *nvws;
@@ -39,6 +41,8 @@ struct nv50_screen {
    struct nouveau_resource *gp_code_heap;
    struct nouveau_resource *fp_code_heap;
 
+   struct nv50_blitctx *blitctx;
+
    struct {
       void **entries;
       int next;
@@ -71,6 +75,8 @@ nv50_screen(struct pipe_screen *screen)
    return (struct nv50_screen *)screen;
 }
 
+boolean nv50_blitctx_create(struct nv50_screen *);
+
 void nv50_screen_make_buffers_resident(struct nv50_screen *);
 
 int nv50_screen_tic_alloc(struct nv50_screen *, void *);
diff --git a/src/gallium/drivers/nv50/nv50_shader_state.c b/src/gallium/drivers/nv50/nv50_shader_state.c
index e5b10c3..d73f7c7 100644
--- a/src/gallium/drivers/nv50/nv50_shader_state.c
+++ b/src/gallium/drivers/nv50/nv50_shader_state.c
@@ -130,13 +130,14 @@ nv50_program_validate(struct nv50_context *nv50, struct nv50_program *prog)
    int ret;
    unsigned size;
 
-   if (prog->translated)
+   if (!prog->translated) {
+      prog->translated = nv50_program_translate(prog);
+      if (!prog->translated)
+         return FALSE;
+   } else
+   if (prog->res)
       return TRUE;
 
-   prog->translated = nv50_program_translate(prog);
-   if (!prog->translated)
-      return FALSE;
-
    if (prog->type == PIPE_SHADER_FRAGMENT) heap = nv50->screen->fp_code_heap;
    else
    if (prog->type == PIPE_SHADER_GEOMETRY) heap = nv50->screen->gp_code_heap;
diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index 8b0b08f..44f2d25 100644
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -350,7 +350,7 @@ static struct state_validate {
 #define validate_list_len (sizeof(validate_list) / sizeof(validate_list[0]))
 
 boolean
-nv50_state_validate(struct nv50_context *nv50)
+nv50_state_validate(struct nv50_context *nv50, unsigned words)
 {
    unsigned i;
 
@@ -367,6 +367,8 @@ nv50_state_validate(struct nv50_context *nv50)
       nv50->dirty = 0;
    }
 
+   MARK_RING(nv50->screen->base.channel, words, 0);
+
    nv50_bufctx_emit_relocs(nv50);
 
    return TRUE;
diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c
index eefbaad..1a5077e 100644
--- a/src/gallium/drivers/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nv50/nv50_surface.c
@@ -368,7 +368,7 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers,
 
    /* don't need NEW_BLEND, COLOR_MASK doesn't affect CLEAR_BUFFERS */
    nv50->dirty &= NV50_NEW_FRAMEBUFFER;
-   if (!nv50_state_validate(nv50))
+   if (!nv50_state_validate(nv50, 9 + (fb->nr_cbufs * 2)))
       return;
 
    if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) {
@@ -405,12 +405,546 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers,
    nv50->dirty = dirty & ~NV50_NEW_FRAMEBUFFER;
 }
 
+
+struct nv50_blitctx
+{
+   struct nv50_screen *screen;
+   struct {
+      struct pipe_framebuffer_state fb;
+      struct nv50_program *vp;
+      struct nv50_program *gp;
+      struct nv50_program *fp;
+      unsigned num_textures[3];
+      unsigned num_samplers[3];
+      struct pipe_sampler_view *texture;
+      struct nv50_tsc_entry *sampler;
+      unsigned dirty;
+      unsigned clip_nr;
+   } saved;
+   struct nv50_program vp;
+   struct nv50_program fp;
+   struct nv50_tsc_entry sampler[2]; /* nearest, bilinear */
+   uint32_t fp_offset;
+   uint16_t color_mask;
+   uint8_t filter;
+};
+
+static void
+nv50_blitctx_make_vp(struct nv50_blitctx *blit)
+{
+   static const uint32_t code[] =
+   {
+      0x10000001, /* mov b32 o[0x00] s[0x00] */ /* HPOS.x */
+      0x0423c788,
+      0x10000205, /* mov b32 o[0x04] s[0x04] */ /* HPOS.y */
+      0x0423c788,
+      0x10000409, /* mov b32 o[0x08] s[0x08] */ /* TEXC.x */
+      0x0423c788,
+      0x1000060d, /* mov b32 o[0x0c] s[0x0c] */ /* TEXC.y */
+      0x0423c788,
+      0x10000811, /* exit mov b32 o[0x10] s[0x10] */ /* TEXC.z */
+      0x0423c789,
+   };
+
+   blit->vp.type = PIPE_SHADER_VERTEX;
+   blit->vp.translated = TRUE;
+   blit->vp.code = (uint32_t *)code; /* const_cast */
+   blit->vp.code_size = sizeof(code);
+   blit->vp.max_gpr = 4;
+   blit->vp.max_out = 5;
+   blit->vp.out_nr = 2;
+   blit->vp.out[0].mask = 0x3;
+   blit->vp.out[0].sn = TGSI_SEMANTIC_POSITION;
+   blit->vp.out[1].hw = 2;
+   blit->vp.out[1].mask = 0x7;
+   blit->vp.out[1].sn = TGSI_SEMANTIC_GENERIC;
+   blit->vp.vp.attrs[0] = 0x73;
+   blit->vp.vp.psiz = 0x40;
+   blit->vp.vp.edgeflag = 0x40;
+}
+
+static void
+nv50_blitctx_make_fp(struct nv50_blitctx *blit)
+{
+   static const uint32_t code[] =
+   {
+      /* 3 coords RGBA in, RGBA out, also for Z32_FLOAT(_S8X24_USCALED) */
+      0x80000000, /* interp $r0 v[0x0] */
+      0x80010004, /* interp $r1 v[0x4] */
+      0x80020009, /* interp $r2 flat v[0x8] */
+      0x00040780,
+      0xf6800001, /* texauto live { $r0,1,2,3 } $t0 $s0 { $r0,1,2 } */
+      0x0000c785, /* exit */
+
+      /* 3 coords ZS in, S encoded in R, Z encoded in GBA (8_UNORM) */
+      0x80000000, /* interp $r0 v[0x00] */
+      0x80010004, /* interp $r1 v[0x04] */
+      0x80020009, /* interp $r2 flat v[0x8] */
+      0x00040780,
+      0xf6800001, /* texauto live { $r0,1,#,# } $t0 $s0 { $r0,1,2 } */
+      0x00000784,
+      0xc03f0009, /* mul f32 $r2 $r0 (2^24 - 1) */
+      0x04b7ffff,
+      0xa0000201, /* cvt f32 $r0 s32 $r1 */
+      0x44014780,
+      0xa0000409, /* cvt rni s32 $r2 f32 $r2 */
+      0x8c004780,
+      0xc0010001, /* mul f32 $r0 $r0 1/0xff */
+      0x03b8080b,
+      0xd03f0405, /* and b32 $r1 $r2 0x0000ff */
+      0x0000000f,
+      0xd000040d, /* and b32 $r3 $r2 0xff0000 */
+      0x000ff003,
+      0xd0000409, /* and b32 $r2 $r2 0x00ff00 */
+      0x00000ff3,
+      0xa0000205, /* cvt f32 $r1 s32 $r1 */
+      0x44014780,
+      0xa000060d, /* cvt f32 $r3 s32 $r3 */
+      0x44014780,
+      0xa0000409, /* cvt f32 $r2 s32 $r2 */
+      0x44014780,
+      0xc0010205, /* mul f32 $r1 $r1 1/0x0000ff */
+      0x03b8080b,
+      0xc001060d, /* mul f32 $r3 $r3 1/0x00ff00 */
+      0x0338080b,
+      0xc0010409, /* mul f32 $r2 $r2 1/0xff0000 */
+      0x0378080b,
+      0xf0000001, /* exit never nop */
+      0xe0000001,
+
+      /* 3 coords ZS in, Z encoded in RGB, S encoded in A (U8_UNORM) */
+      0x80000000, /* interp $r0 v[0x00] */
+      0x80010004, /* interp $r1 v[0x04] */
+      0x80020009, /* interp $r2 flat v[0x8] */
+      0x00040780,
+      0xf6800001, /* texauto live { $r0,1,#,# } $t0 $s0 { $r0,1,2 } */
+      0x00000784,
+      0xc03f0009, /* mul f32 $r2 $r0 (2^24 - 1) */
+      0x04b7ffff,
+      0xa0000281, /* cvt f32 $r3 s32 $r1 */
+      0x44014780,
+      0xa0000409, /* cvt rni s32 $r2 f32 $r2 */
+      0x8c004780,
+      0xc001060d, /* mul f32 $r3 $r3 1/0xff */
+      0x03b8080b,
+      0xd03f0401, /* and b32 $r0 $r2 0x0000ff */
+      0x0000000f,
+      0xd0000405, /* and b32 $r1 $r2 0x00ff00 */
+      0x00000ff3,
+      0xd0000409, /* and b32 $r2 $r2 0xff0000 */
+      0x000ff003,
+      0xa0000001, /* cvt f32 $r0 s32 $r0 */
+      0x44014780,
+      0xa0000205, /* cvt f32 $r1 s32 $r1 */
+      0x44014780,
+      0xa0000409, /* cvt f32 $r2 s32 $r2 */
+      0x44014780,
+      0xc0010001, /* mul f32 $r0 $r0 1/0x0000ff */
+      0x03b8080b,
+      0xc0010205, /* mul f32 $r1 $r1 1/0x00ff00 */
+      0x0378080b,
+      0xc0010409, /* mul f32 $r2 $r2 1/0xff0000 */
+      0x0338080b,
+      0xf0000001, /* exit never nop */
+      0xe0000001
+   };
+
+   blit->fp.type = PIPE_SHADER_FRAGMENT;
+   blit->fp.translated = TRUE;
+   blit->fp.code = (uint32_t *)code; /* const_cast */
+   blit->fp.code_size = sizeof(code);
+   blit->fp.max_gpr = 4;
+   blit->fp.max_out = 4;
+   blit->fp.in_nr = 1;
+   blit->fp.in[0].mask = 0x7; /* last component flat */
+   blit->fp.in[0].linear = 1;
+   blit->fp.in[0].sn = TGSI_SEMANTIC_GENERIC;
+   blit->fp.out_nr = 1;
+   blit->fp.out[0].mask = 0xf;
+   blit->fp.out[0].sn = TGSI_SEMANTIC_COLOR;
+   blit->fp.fp.interp = 0x00020403;
+   blit->fp.gp.primid = 0x80;
+}
+
+static void
+nv50_blitctx_make_sampler(struct nv50_blitctx *blit)
+{
+   /* clamp to edge, min/max lod = 0, nearest filtering */
+
+   blit->sampler[0].id = -1;
+
+   blit->sampler[0].tsc[0] = 0x00000092;
+   blit->sampler[0].tsc[1] = 0x00000051;
+
+   /* clamp to edge, min/max lod = 0, bilinear filtering */
+
+   blit->sampler[1].id = -1;
+
+   blit->sampler[1].tsc[0] = 0x00000092;
+   blit->sampler[1].tsc[1] = 0x00000062;
+}
+
+/* Since shaders cannot export stencil, we cannot copy stencil values when
+ * rendering to ZETA, so we attach the ZS surface to a colour render target.
+ */
+static INLINE enum pipe_format
+nv50_blit_zeta_to_colour_format(enum pipe_format format)
+{
+   switch (format) {
+   case PIPE_FORMAT_Z16_UNORM:               return PIPE_FORMAT_R16_UNORM;
+   case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
+   case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
+   case PIPE_FORMAT_Z24X8_UNORM:             return PIPE_FORMAT_R8G8B8A8_UNORM;
+   case PIPE_FORMAT_Z32_FLOAT:               return PIPE_FORMAT_R32_FLOAT;
+   case PIPE_FORMAT_Z32_FLOAT_S8X24_USCALED: return PIPE_FORMAT_R32G32_FLOAT;
+   default:
+      assert(0);
+      return PIPE_FORMAT_NONE;
+   }
+}
+
+static void
+nv50_blitctx_get_color_mask_and_fp(struct nv50_blitctx *blit,
+                                   enum pipe_format format, uint8_t mask)
+{
+   blit->color_mask = 0;
+
+   switch (format) {
+   case PIPE_FORMAT_Z24X8_UNORM:
+   case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
+      blit->fp_offset = 160;
+      if (mask & PIPE_MASK_Z)
+         blit->color_mask |= 0x0111;
+      if (mask & PIPE_MASK_S)
+         blit->color_mask |= 0x1000;
+      break;
+   case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
+      blit->fp_offset = 24;
+      if (mask & PIPE_MASK_Z)
+         blit->color_mask |= 0x1110;
+      if (mask & PIPE_MASK_S)
+         blit->color_mask |= 0x0001;
+      break;
+   default:
+      blit->fp_offset = 0;
+      if (mask & (PIPE_MASK_R | PIPE_MASK_Z)) blit->color_mask |= 0x0001;
+      if (mask & (PIPE_MASK_G | PIPE_MASK_S)) blit->color_mask |= 0x0010;
+      if (mask & PIPE_MASK_B) blit->color_mask |= 0x0100;
+      if (mask & PIPE_MASK_A) blit->color_mask |= 0x1000;
+      break;
+   }
+}
+
+static void
+nv50_blit_set_dst(struct nv50_context *nv50,
+                  struct pipe_resource *res, unsigned level, unsigned layer)
+{
+   struct pipe_context *pipe = &nv50->base.pipe;
+   struct pipe_surface templ;
+
+   if (util_format_is_depth_or_stencil(res->format))
+      templ.format = nv50_blit_zeta_to_colour_format(res->format);
+   else
+      templ.format = res->format;
+
+   templ.usage = PIPE_USAGE_STREAM;
+   templ.u.tex.level = level;
+   templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
+
+   nv50->framebuffer.cbufs[0] = nv50_miptree_surface_new(pipe, res, &templ);
+   nv50->framebuffer.nr_cbufs = 1;
+   nv50->framebuffer.zsbuf = NULL;
+   nv50->framebuffer.width = nv50->framebuffer.cbufs[0]->width;
+   nv50->framebuffer.height = nv50->framebuffer.cbufs[0]->height;
+}
+
+static INLINE void
+nv50_blit_fixup_tic_entry(struct pipe_sampler_view *view)
+{
+   struct nv50_tic_entry *ent = nv50_tic_entry(view);
+
+   ent->tic[2] &= ~(1 << 31); /* scaled coordinates, ok with 3d textures ? */
+
+   /* magic: */
+
+   ent->tic[3] = 0x20000000; /* affects quality of near vertical edges in MS8 */
+}
+
+static void
+nv50_blit_set_src(struct nv50_context *nv50,
+                  struct pipe_resource *res, unsigned level, unsigned layer)
+{
+   struct pipe_context *pipe = &nv50->base.pipe;
+   struct pipe_sampler_view templ;
+
+   templ.format = res->format;
+   templ.u.tex.first_layer = templ.u.tex.last_layer = layer;
+   templ.u.tex.first_level = templ.u.tex.last_level = level;
+   templ.swizzle_r = PIPE_SWIZZLE_RED;
+   templ.swizzle_g = PIPE_SWIZZLE_GREEN;
+   templ.swizzle_b = PIPE_SWIZZLE_BLUE;
+   templ.swizzle_a = PIPE_SWIZZLE_ALPHA;
+
+   nv50->textures[2][0] = nv50_create_sampler_view(pipe, res, &templ);
+
+   nv50_blit_fixup_tic_entry(nv50->textures[2][0]);
+
+   nv50->num_textures[0] = nv50->num_textures[1] = 0;
+   nv50->num_textures[2] = 1;
+}
+
+static void
+nv50_blitctx_prepare_state(struct nv50_blitctx *blit)
+{
+   struct nouveau_channel *chan = blit->screen->base.channel;
+
+   /* blend state */
+   BEGIN_RING(chan, RING_3D(COLOR_MASK(0)), 1);
+   OUT_RING  (chan, blit->color_mask);
+   BEGIN_RING(chan, RING_3D(BLEND_ENABLE(0)), 1);
+   OUT_RING  (chan, 0);
+   BEGIN_RING(chan, RING_3D(LOGIC_OP_ENABLE), 1);
+   OUT_RING  (chan, 0);
+
+   /* rasterizer state */
+#ifndef NV50_SCISSORS_CLIPPING
+   BEGIN_RING(chan, RING_3D(SCISSOR_ENABLE(0)), 1);
+   OUT_RING  (chan, 1);
+#endif
+   BEGIN_RING(chan, RING_3D(VERTEX_TWO_SIDE_ENABLE), 1);
+   OUT_RING  (chan, 0);
+   BEGIN_RING(chan, RING_3D(FRAG_COLOR_CLAMP_EN), 1);
+   OUT_RING  (chan, 0);
+   BEGIN_RING(chan, RING_3D(MULTISAMPLE_ENABLE), 1);
+   OUT_RING  (chan, 0);
+   BEGIN_RING(chan, RING_3D(MSAA_MASK(0)), 4);
+   OUT_RING  (chan, 0xffff);
+   OUT_RING  (chan, 0xffff);
+   OUT_RING  (chan, 0xffff);
+   OUT_RING  (chan, 0xffff);
+   BEGIN_RING(chan, RING_3D(POLYGON_MODE_FRONT), 3);
+   OUT_RING  (chan, NV50_3D_POLYGON_MODE_FRONT_FILL);
+   OUT_RING  (chan, NV50_3D_POLYGON_MODE_BACK_FILL);
+   OUT_RING  (chan, 0);
+   BEGIN_RING(chan, RING_3D(CULL_FACE_ENABLE), 1);
+   OUT_RING  (chan, 0);
+   BEGIN_RING(chan, RING_3D(POLYGON_STIPPLE_ENABLE), 1);
+   OUT_RING  (chan, 0);
+   BEGIN_RING(chan, RING_3D(POLYGON_OFFSET_FILL_ENABLE), 1);
+   OUT_RING  (chan, 0);
+
+   /* zsa state */
+   BEGIN_RING(chan, RING_3D(DEPTH_TEST_ENABLE), 1);
+   OUT_RING  (chan, 0);
+   BEGIN_RING(chan, RING_3D(STENCIL_ENABLE), 1);
+   OUT_RING  (chan, 0);
+   BEGIN_RING(chan, RING_3D(ALPHA_TEST_ENABLE), 1);
+   OUT_RING  (chan, 0);
+}
+
+static void
+nv50_blitctx_pre_blit(struct nv50_blitctx *blit, struct nv50_context *nv50)
+{
+   int s;
+
+   blit->saved.fb.width = nv50->framebuffer.width;
+   blit->saved.fb.height = nv50->framebuffer.height;
+   blit->saved.fb.nr_cbufs = nv50->framebuffer.nr_cbufs;
+   blit->saved.fb.cbufs[0] = nv50->framebuffer.cbufs[0];
+   blit->saved.fb.zsbuf = nv50->framebuffer.zsbuf;
+
+   blit->saved.vp = nv50->vertprog;
+   blit->saved.gp = nv50->gmtyprog;
+   blit->saved.fp = nv50->fragprog;
+
+   nv50->vertprog = &blit->vp;
+   nv50->gmtyprog = NULL;
+   nv50->fragprog = &blit->fp;
+
+   blit->saved.clip_nr = nv50->clip.nr;
+
+   nv50->clip.nr = 0;
+
+   for (s = 0; s < 3; ++s) {
+      blit->saved.num_textures[s] = nv50->num_textures[s];
+      blit->saved.num_samplers[s] = nv50->num_samplers[s];
+   }
+   blit->saved.texture = nv50->textures[2][0];
+   blit->saved.sampler = nv50->samplers[2][0];
+
+   nv50->samplers[2][0] = &blit->sampler[blit->filter];
+
+   nv50->num_samplers[0] = nv50->num_samplers[1] = 0;
+   nv50->num_samplers[2] = 1;
+
+   blit->saved.dirty = nv50->dirty;
+
+   nv50->dirty =
+      NV50_NEW_FRAMEBUFFER |
+      NV50_NEW_VERTPROG | NV50_NEW_FRAGPROG | NV50_NEW_GMTYPROG |
+      NV50_NEW_TEXTURES | NV50_NEW_SAMPLERS;
+}
+
+static void
+nv50_blitctx_post_blit(struct nv50_context *nv50, struct nv50_blitctx *blit)
+{
+   int s;
+
+   pipe_surface_reference(&nv50->framebuffer.cbufs[0], NULL);
+
+   nv50->framebuffer.width = blit->saved.fb.width;
+   nv50->framebuffer.height = blit->saved.fb.height;
+   nv50->framebuffer.nr_cbufs = blit->saved.fb.nr_cbufs;
+   nv50->framebuffer.cbufs[0] = blit->saved.fb.cbufs[0];
+   nv50->framebuffer.zsbuf = blit->saved.fb.zsbuf;
+
+   nv50->vertprog = blit->saved.vp;
+   nv50->gmtyprog = blit->saved.gp;
+   nv50->fragprog = blit->saved.fp;
+
+   nv50->clip.nr = blit->saved.clip_nr;
+
+   pipe_sampler_view_reference(&nv50->textures[2][0], NULL);
+
+   for (s = 0; s < 3; ++s) {
+      nv50->num_textures[s] = blit->saved.num_textures[s];
+      nv50->num_samplers[s] = blit->saved.num_samplers[s];
+   }
+   nv50->textures[2][0] = blit->saved.texture;
+   nv50->samplers[2][0] = blit->saved.sampler;
+
+   nv50->dirty = blit->saved.dirty |
+      (NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR | NV50_NEW_SAMPLE_MASK |
+       NV50_NEW_RASTERIZER | NV50_NEW_ZSA | NV50_NEW_BLEND |
+       NV50_NEW_TEXTURES | NV50_NEW_SAMPLERS |
+       NV50_NEW_VERTPROG | NV50_NEW_GMTYPROG | NV50_NEW_FRAGPROG);
+}
+
+static void
+nv50_resource_resolve(struct pipe_context *pipe,
+                      const struct pipe_resolve_info *info)
+{
+   struct nv50_context *nv50 = nv50_context(pipe);
+   struct nv50_screen *screen = nv50->screen;
+   struct nv50_blitctx *blit = screen->blitctx;
+   struct nouveau_channel *chan = screen->base.channel;
+   struct pipe_resource *src = info->src.res;
+   struct pipe_resource *dst = info->dst.res;
+   float x0, x1, y0, y1, z;
+   float x_range, y_range;
+
+   nv50_blitctx_get_color_mask_and_fp(blit, dst->format, info->mask);
+
+   blit->filter = util_format_is_depth_or_stencil(dst->format) ? 0 : 1;
+
+   nv50_blitctx_pre_blit(blit, nv50);
+
+   nv50_blit_set_dst(nv50, dst, info->dst.level, info->dst.layer);
+   nv50_blit_set_src(nv50, src, 0,               info->src.layer);
+
+   nv50_blitctx_prepare_state(blit);
+
+   nv50_state_validate(nv50, 36);
+
+   x_range =
+      (float)(info->src.x1 - info->src.x0) /
+      (float)(info->dst.x1 - info->dst.x0);
+   y_range =
+      (float)(info->src.y1 - info->src.y0) /
+      (float)(info->dst.y1 - info->dst.y0);
+
+   x0 = (float)info->src.x0 - x_range * (float)info->dst.x0;
+   y0 = (float)info->src.y0 - y_range * (float)info->dst.y0;
+
+   x1 = x0 + 16384.0f * x_range;
+   y1 = y0 + 16384.0f * y_range;
+
+   x0 *= (float)(1 << nv50_miptree(src)->ms_x);
+   x1 *= (float)(1 << nv50_miptree(src)->ms_x);
+   y0 *= (float)(1 << nv50_miptree(src)->ms_y);
+   y1 *= (float)(1 << nv50_miptree(src)->ms_y);
+
+   z = (float)info->src.layer;
+
+   BEGIN_RING(chan, RING_3D(FP_START_ID), 1);
+   OUT_RING  (chan,
+              blit->fp.code_base + blit->fp_offset);
+
+   BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSFORM_EN), 1);
+   OUT_RING  (chan, 0);
+
+   /* Draw a large triangle in screen coordinates covering the whole
+    * render target, with scissors defining the destination region.
+    * The vertex is supplied with non-normalized texture coordinates
+    * arranged in a way to yield the desired offset and scale.
+    */
+
+   BEGIN_RING(chan, RING_3D(SCISSOR_HORIZ(0)), 2);
+   OUT_RING  (chan, (info->dst.x1 << 16) | info->dst.x0);
+   OUT_RING  (chan, (info->dst.y1 << 16) | info->dst.y0);
+
+   BEGIN_RING(chan, RING_3D(VERTEX_BEGIN_GL), 1);
+   OUT_RING  (chan, NV50_3D_VERTEX_BEGIN_GL_PRIMITIVE_TRIANGLES);
+   BEGIN_RING(chan, RING_3D(VTX_ATTR_3F_X(1)), 3);
+   OUT_RINGf (chan, x0);
+   OUT_RINGf (chan, y0);
+   OUT_RINGf (chan, z);
+   BEGIN_RING(chan, RING_3D(VTX_ATTR_2F_X(0)), 2);
+   OUT_RINGf (chan, 0.0f);
+   OUT_RINGf (chan, 0.0f);
+   BEGIN_RING(chan, RING_3D(VTX_ATTR_3F_X(1)), 3);
+   OUT_RINGf (chan, x1);
+   OUT_RINGf (chan, y0);
+   OUT_RINGf (chan, z);
+   BEGIN_RING(chan, RING_3D(VTX_ATTR_2F_X(0)), 2);
+   OUT_RINGf (chan, 16384 << nv50_miptree(dst)->ms_x);
+   OUT_RINGf (chan, 0.0f);
+   BEGIN_RING(chan, RING_3D(VTX_ATTR_3F_X(1)), 3);
+   OUT_RINGf (chan, x0);
+   OUT_RINGf (chan, y1);
+   OUT_RINGf (chan, z);
+   BEGIN_RING(chan, RING_3D(VTX_ATTR_2F_X(0)), 2);
+   OUT_RINGf (chan, 0.0f);
+   OUT_RINGf (chan, 16384 << nv50_miptree(dst)->ms_y);
+   BEGIN_RING(chan, RING_3D(VERTEX_END_GL), 1);
+   OUT_RING  (chan, 0);
+
+   /* re-enable normally constant state */
+
+   BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSFORM_EN), 1);
+   OUT_RING  (chan, 1);
+
+   nv50_blitctx_post_blit(nv50, blit);
+}
+
+boolean
+nv50_blitctx_create(struct nv50_screen *screen)
+{
+   screen->blitctx = CALLOC_STRUCT(nv50_blitctx);
+   if (!screen->blitctx) {
+      NOUVEAU_ERR("failed to allocate blit context\n");
+      return FALSE;
+   }
+
+   screen->blitctx->screen = screen;
+
+   nv50_blitctx_make_vp(screen->blitctx);
+   nv50_blitctx_make_fp(screen->blitctx);
+
+   nv50_blitctx_make_sampler(screen->blitctx);
+
+   screen->blitctx->color_mask = 0x1111;
+
+   return TRUE;
+}
+
 void
 nv50_init_surface_functions(struct nv50_context *nv50)
 {
    struct pipe_context *pipe = &nv50->base.pipe;
 
    pipe->resource_copy_region = nv50_resource_copy_region;
+   pipe->resource_resolve = nv50_resource_resolve;
    pipe->clear_render_target = nv50_clear_render_target;
    pipe->clear_depth_stencil = nv50_clear_depth_stencil;
 }
diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c
index f23008a..1c8347a 100644
--- a/src/gallium/drivers/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nv50/nv50_vbo.c
@@ -647,7 +647,7 @@ nv50_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
    if (nv50->vbo_user && !(nv50->dirty & (NV50_NEW_VERTEX | NV50_NEW_ARRAYS)))
       nv50_update_user_vbufs(nv50);
 
-   nv50_state_validate(nv50);
+   nv50_state_validate(nv50, 8); /* 8 as minimum, we use flush_notify here */
 
    chan->flush_notify = nv50_draw_vbo_flush_notify;
 
-- 
1.7.3.4



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