[Mesa-dev] Coding or Table based approach for r600g? (was RFC: 0001-r600g-R700-can-do-more-than-8-tex-and-vtx-clauses.patch)

Henri Verbeet hverbeet at gmail.com
Thu Mar 10 10:44:02 PST 2011

2011/3/9 Christian König <deathsimple at vodafone.de>:
> So please take a look at the attached patch, it shouldn't change the
> generated bytecode a bit, but just makes the code more readable (at
> least I think so) and easier to extend.
The general approach makes sense to me. Having flags may be nicer than
having separate bools for the instruction info table though. The
instruction info and chiprev info tables are separate changes, of
course. I'm not sure about exposing the tables themselves directly.
Related to that is that I think r600_bc_init() may not be the right
place for that switch, it seems like the kind of thing you want to
initialize during context, or perhaps even winsys creation. The
OP2/OP3 distinction isn't very nice, we could probably get rid of that
by introducing extra indirection (i.e., R600_INST_* and then only map
to actual instructions during the final stage of translation), but I
don't think it's worth it.

> +	if(alu->is_op3)
Most of r600g has a space between control statements and the brace.

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