[Mesa-dev] r600g on rv635 and broken mipmaps

Alex Deucher alexdeucher at gmail.com
Thu May 5 00:21:43 PDT 2011

2011/5/5 Alex Deucher <alexdeucher at gmail.com>:
> 2011/5/5 Mathias Fröhlich <Mathias.Froehlich at gmx.net>:
>> Hi all,
>> On Thursday, May 05, 2011 04:32:03 you wrote:
>>> Okay my guess at the problem is that:
>>> the CP tracks coherency but the SURFACE_BASE_UPDATE stuff might rely
>>> on the base in the CB being the same as the texture BASE which it won't
>>> be in the case where we are rendering to mip sublevels. Though I've no idea
>>> how to workaround this without explicit flushes.
>> Hmm, may be.
>> I also thought that the surface sync packet has some special case optimzations
>> for some of the probably often used flags that lead to that kind of behaviour.
>> May be that 'flush all' in case of a new framebuffer target for these kind of
>> chips is again a good idea instead of the finegrained flush dest caches.
>> May be Alex finds some undocumented ideas somewhere in his bag :).
> Apparently the CB/DB surface sync stuff has a number of issues on
> r6xx, so we should just use event_write flushes for CB/DB.  A single
> event write flush takes care of all dst caches.  Something like this
> untested patch perhaps:
> http://people.freedesktop.org/~agd5f/r600g_event_flush.diff

The attached patch seems to work for me.

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