[Mesa-dev] [PATCH 02/18] i965: Warnings cleanup.

[Ian Romanick]

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For 2/18, 3/18, 6/18, 7/18, 9/18, 10/18, 11/18, 12/18, 13/18, 14/18, and
15/18:

Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>

However, it might be better to split the brw_defines.h and
brw_wm_surface_state.c changes in 9/18.  We could end up cherry picking
some other patch that depends on some of the infrastructure in 9/18, but
we wouldn't want the other changes.  It's probably not a huge deal.

The other patches in the series either appear to already be pushed or
are in areas of the code that I don't know very well.

On 05/24/2011 04:00 PM, Eric Anholt wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_eu_emit.c   |    3 ---
>  src/mesa/drivers/dri/i965/gen7_vs_state.c |    1 -
>  2 files changed, 0 insertions(+), 4 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> index 2d41302..e7370f3 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> @@ -93,8 +93,6 @@ static void brw_set_dest(struct brw_compile *p,
>  			 struct brw_instruction *insn,
>  			 struct brw_reg dest)
>  {
> -   struct intel_context *intel = &p->brw->intel;
> -
>     if (dest.file != BRW_ARCHITECTURE_REGISTER_FILE &&
>         dest.file != BRW_MESSAGE_REGISTER_FILE)
>        assert(dest.nr < 128);
> @@ -1254,7 +1252,6 @@ struct brw_instruction *gen6_CONT(struct brw_compile *p,
>  				  struct brw_instruction *do_insn)
>  {
>     struct brw_instruction *insn;
> -   int br = 2;
>  
>     insn = next_insn(p, BRW_OPCODE_CONTINUE);
>     brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
> diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
> index 6a7add8..ae7a1d6 100644
> --- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
> @@ -33,7 +33,6 @@ static void
>  upload_vs_state(struct brw_context *brw)
>  {
>     struct intel_context *intel = &brw->intel;
> -   struct gl_context *ctx = &intel->ctx;
>  
>     BEGIN_BATCH(2);
>     OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS_VS << 16 | (2 - 2));

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