[Mesa-dev] [PATCH 5/5] i965: Set HiZ operations in intel_context::vtbl

[Chad Versace]

If HiZ is enabled for the context, set
    hiz_resolve_depthbuffer = gen6_hiz_resolve_depthbuffer
    hiz_resolve_hizbuffer = gen6_hiz_resolve_hizbuffer
Otherwise, set the resolve funcs to be no-ops.

Signed-off-by: Chad Versace <chad at chad-versace.us>
---
 src/mesa/drivers/dri/i965/brw_vtbl.c |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index 8b3677b..52be175 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -49,6 +49,8 @@
 #include "brw_vs.h"
 #include "brw_wm.h"
 
+#include "gen6_hiz.h"
+
 #include "glsl/ralloc.h"
 
 static void
@@ -237,6 +239,11 @@ static bool brw_is_hiz_depth_format(struct intel_context *intel,
    return intel->has_hiz && (format == MESA_FORMAT_X8_Z24);
 }
 
+static void brw_hiz_resolve_noop(struct intel_context *intel,
+				 struct intel_region *depth_region)
+{
+   /* empty */
+}
 
 void brwInitVtbl( struct brw_context *brw )
 {
@@ -254,4 +261,12 @@ void brwInitVtbl( struct brw_context *brw )
    brw->intel.vtbl.debug_batch = brw_debug_batch;
    brw->intel.vtbl.render_target_supported = brw_render_target_supported;
    brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
+
+   if (brw->intel.has_hiz) {
+      brw->intel.vtbl.hiz_resolve_hizbuffer = gen6_hiz_resolve_hizbuffer;
+      brw->intel.vtbl.hiz_resolve_depthbuffer = gen6_hiz_resolve_depthbuffer;
+   } else {
+      brw->intel.vtbl.hiz_resolve_hizbuffer = brw_hiz_resolve_noop;
+      brw->intel.vtbl.hiz_resolve_depthbuffer = brw_hiz_resolve_noop;
+   }
 }
-- 
1.7.6.4