[Mesa-dev] [PATCH 06/19] intel: Add 'mode' param to intel_region_map
Chad Versace
chad at chad-versace.us
Fri Sep 23 17:37:36 PDT 2011
The 'mode' param is a bitmask of GL_MAP_READ_BIT and GL_MAP_WRITE_BIT.
A future commit will perform HiZ resolve operations in intel_region_map().
So, even though the access mode is irrelevant to the GTT, the extra
information allows us to intelligently avoid unneccessary HiZ ops.
Signed-off-by: Chad Versace <chad at chad-versace.us>
---
src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 11 +++++++----
src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 1 +
src/mesa/drivers/dri/intel/intel_regions.c | 6 ++++--
src/mesa/drivers/dri/intel/intel_regions.h | 8 ++++++--
src/mesa/drivers/dri/intel/intel_span.c | 6 ++++--
src/mesa/drivers/dri/intel/intel_tex.c | 6 ++++--
src/mesa/drivers/dri/intel/intel_tex.h | 6 ++++--
src/mesa/drivers/dri/intel/intel_tex_image.c | 2 ++
src/mesa/drivers/dri/intel/intel_tex_validate.c | 15 ++++++++++++---
9 files changed, 44 insertions(+), 17 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 18427b5..b8e583c 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -311,6 +311,8 @@ intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
/**
* Map a teximage in a mipmap tree.
+ *
+ * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT
* \param row_stride returns row stride in bytes
* \param image_stride returns image stride in bytes (for 3D textures).
* \param image_offsets pointer to array of pixel offsets from the returned
@@ -322,6 +324,7 @@ intel_miptree_image_map(struct intel_context * intel,
struct intel_mipmap_tree * mt,
GLuint face,
GLuint level,
+ GLbitfield mode,
GLuint * row_stride, GLuint * image_offsets)
{
GLuint x, y;
@@ -341,7 +344,7 @@ intel_miptree_image_map(struct intel_context * intel,
DBG("%s \n", __FUNCTION__);
- return intel_region_map(intel, mt->region);
+ return intel_region_map(intel, mt->region, mode);
} else {
assert(mt->level[level].depth == 1);
intel_miptree_get_image_offset(mt, level, face, 0,
@@ -351,7 +354,7 @@ intel_miptree_image_map(struct intel_context * intel,
DBG("%s: (%d,%d) -> (%d, %d)/%d\n",
__FUNCTION__, face, level, x, y, mt->region->pitch * mt->cpp);
- return intel_region_map(intel, mt->region) +
+ return intel_region_map(intel, mt->region, mode) +
(x + y * mt->region->pitch) * mt->cpp;
}
}
@@ -451,8 +454,8 @@ intel_miptree_image_copy(struct intel_context *intel,
if (!success) {
GLubyte *src_ptr, *dst_ptr;
- src_ptr = intel_region_map(intel, src->region);
- dst_ptr = intel_region_map(intel, dst->region);
+ src_ptr = intel_region_map(intel, src->region, GL_MAP_READ_BIT);
+ dst_ptr = intel_region_map(intel, dst->region, GL_MAP_WRITE_BIT);
_mesa_copy_rect(dst_ptr,
dst->cpp,
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index 7f20319..b30eb91 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -173,6 +173,7 @@ GLubyte *intel_miptree_image_map(struct intel_context *intel,
struct intel_mipmap_tree *mt,
GLuint face,
GLuint level,
+ GLbitfield mode,
GLuint * row_stride, GLuint * image_stride);
void intel_miptree_image_unmap(struct intel_context *intel,
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index cd0542c..0a5c2c1 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -109,7 +109,8 @@ debug_backtrace(void)
/* XXX: Thread safety?
*/
GLubyte *
-intel_region_map(struct intel_context *intel, struct intel_region *region)
+intel_region_map(struct intel_context *intel, struct intel_region *region,
+ GLbitfield mode)
{
intel_flush(&intel->ctx);
@@ -362,7 +363,8 @@ intel_region_data(struct intel_context *intel,
intel_prepare_render(intel);
- _mesa_copy_rect(intel_region_map(intel, dst) + dst_offset,
+ GLubyte *dst_base = intel_region_map(intel, dst, GL_MAP_WRITE_BIT);
+ _mesa_copy_rect(dst_base + dst_offset,
dst->cpp,
dst->pitch,
dstx, dsty, width, height, src, src_pitch, srcx, srcy);
diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h
index 3b7a3cf..209ea90 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.h
+++ b/src/mesa/drivers/dri/intel/intel_regions.h
@@ -115,10 +115,14 @@ void intel_region_release(struct intel_region **ib);
void intel_recreate_static_regions(struct intel_context *intel);
-/* Map/unmap regions. This is refcounted also:
+/**
+ * Map/unmap regions. This is refcounted also:
+ *
+ * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT
*/
GLubyte *intel_region_map(struct intel_context *intel,
- struct intel_region *ib);
+ struct intel_region *ib,
+ GLbitfield mode);
void intel_region_unmap(struct intel_context *intel, struct intel_region *ib);
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 2e1c80c..9760844 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -321,7 +321,8 @@ intelSpanRenderStart(struct gl_context * ctx)
struct gl_texture_object *texObj = ctx->Texture.Unit[i]._Current;
intel_finalize_mipmap_tree(intel, i);
- intel_tex_map_images(intel, intel_texture_object(texObj));
+ intel_tex_map_images(intel, intel_texture_object(texObj),
+ GL_MAP_READ_BIT | GL_MAP_WRITE_BIT);
}
}
@@ -379,7 +380,8 @@ intel_map_vertex_shader_textures(struct gl_context *ctx)
ctx->VertexProgram._Current->Base.TexturesUsed[i] != 0) {
struct gl_texture_object *texObj = ctx->Texture.Unit[i]._Current;
- intel_tex_map_images(intel, intel_texture_object(texObj));
+ intel_tex_map_images(intel, intel_texture_object(texObj),
+ GL_MAP_READ_BIT | GL_MAP_WRITE_BIT);
}
}
}
diff --git a/src/mesa/drivers/dri/intel/intel_tex.c b/src/mesa/drivers/dri/intel/intel_tex.c
index 8d3cbd6..9cf88db 100644
--- a/src/mesa/drivers/dri/intel/intel_tex.c
+++ b/src/mesa/drivers/dri/intel/intel_tex.c
@@ -83,6 +83,7 @@ intel_free_texture_image_buffer(struct gl_context * ctx,
/**
* Map texture memory/buffer into user space.
* Note: the region of interest parameters are ignored here.
+ * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT
* \param mapOut returns start of mapping of region of interest
* \param rowStrideOut returns row stride in bytes
*/
@@ -118,7 +119,7 @@ intel_map_texture_image(struct gl_context *ctx,
y /= bh;
if (likely(mt)) {
- void *base = intel_region_map(intel, mt->region);
+ void *base = intel_region_map(intel, mt->region, mode);
unsigned int image_x, image_y;
intel_miptree_get_image_offset(mt, tex_image->Level, tex_image->Face,
@@ -180,7 +181,8 @@ intelGenerateMipmap(struct gl_context *ctx, GLenum target,
fallback_debug("%s - fallback to swrast\n", __FUNCTION__);
- intel_tex_map_level_images(intel, intelObj, texObj->BaseLevel);
+ intel_tex_map_level_images(intel, intelObj, texObj->BaseLevel,
+ GL_MAP_READ_BIT | GL_MAP_WRITE_BIT);
_mesa_generate_mipmap(ctx, target, texObj);
intel_tex_unmap_level_images(intel, intelObj, texObj->BaseLevel);
diff --git a/src/mesa/drivers/dri/intel/intel_tex.h b/src/mesa/drivers/dri/intel/intel_tex.h
index 895c634..7059a4b 100644
--- a/src/mesa/drivers/dri/intel/intel_tex.h
+++ b/src/mesa/drivers/dri/intel/intel_tex.h
@@ -51,14 +51,16 @@ GLuint intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit);
void intel_tex_map_level_images(struct intel_context *intel,
struct intel_texture_object *intelObj,
- int level);
+ int level,
+ GLbitfield mode);
void intel_tex_unmap_level_images(struct intel_context *intel,
struct intel_texture_object *intelObj,
int level);
void intel_tex_map_images(struct intel_context *intel,
- struct intel_texture_object *intelObj);
+ struct intel_texture_object *intelObj,
+ GLbitfield mode);
void intel_tex_unmap_images(struct intel_context *intel,
struct intel_texture_object *intelObj);
diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c
index 8fd69c3..2d8519f 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_image.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_image.c
@@ -430,6 +430,7 @@ intelTexImage(struct gl_context * ctx,
intelImage->mt,
intelImage->base.Base.Face,
intelImage->base.Base.Level,
+ GL_MAP_WRITE_BIT,
&dstRowStride,
intelImage->base.Base.ImageOffsets);
}
@@ -600,6 +601,7 @@ intel_get_tex_image(struct gl_context * ctx, GLenum target, GLint level,
intelImage->mt,
intelImage->base.Base.Face,
intelImage->base.Base.Level,
+ GL_MAP_READ_BIT,
&intelImage->base.Base.RowStride,
intelImage->base.Base.ImageOffsets);
intelImage->base.Base.RowStride /= intelImage->mt->cpp;
diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c
index 59f39de..d476f99 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c
@@ -160,10 +160,14 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit)
return GL_TRUE;
}
+/**
+ * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT
+ */
void
intel_tex_map_level_images(struct intel_context *intel,
struct intel_texture_object *intelObj,
- int level)
+ int level,
+ GLbitfield mode)
{
GLuint nr_faces = (intelObj->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
GLuint face;
@@ -178,6 +182,7 @@ intel_tex_map_level_images(struct intel_context *intel,
intelImage->mt,
intelImage->base.Base.Face,
intelImage->base.Base.Level,
+ mode,
&intelImage->base.Base.RowStride,
intelImage->base.Base.ImageOffsets);
/* convert stride to texels, not bytes */
@@ -206,16 +211,20 @@ intel_tex_unmap_level_images(struct intel_context *intel,
}
}
+/**
+ * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT
+ */
void
intel_tex_map_images(struct intel_context *intel,
- struct intel_texture_object *intelObj)
+ struct intel_texture_object *intelObj,
+ GLbitfield mode)
{
int i;
DBG("%s\n", __FUNCTION__);
for (i = intelObj->base.BaseLevel; i <= intelObj->_MaxLevel; i++)
- intel_tex_map_level_images(intel, intelObj, i);
+ intel_tex_map_level_images(intel, intelObj, i, mode);
}
void
--
1.7.6.2
More information about the mesa-dev
mailing list