[Mesa-dev] [PATCH 2/2] i965: Allow SIMD16 color writes on Ivybridge.

[Kenneth Graunke]

Again, the check was needlessly specific: this works fine on Gen7.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 60d79ef..e4746db 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1803,7 +1803,7 @@ fs_visitor::emit_color_write(int index, int first_color_mrf, fs_reg color)
    int reg_width = c->dispatch_width / 8;
    fs_inst *inst;
 
-   if (c->dispatch_width == 8 || intel->gen == 6) {
+   if (c->dispatch_width == 8 || intel->gen >= 6) {
       /* SIMD8 write looks like:
        * m + 0: r0
        * m + 1: r1
-- 
1.7.6.1